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HMC830 Datasheet(PDF) 3 Page - Analog Devices

Part # HMC830
Description  Fractional-N PLL with Integrated VCO
PDF  14 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

HMC830 Datasheet(HTML) 3 Page - Analog Devices

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For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
Phone: 978-250-3343
Fax: 978-250-3373
Order On-line at www.hittite.com
Application Support: Phone: 978-250-3343 or apps@hittite.com
3
HMC830LP6GE
v03.0512
Fractional-n Pll with integrated Vco
25 - 3000 Mhz
Parameter
Condition
Min.
typ.
Max.
Units
14-Bit r-divider range
1
16,383
Phase Detector (PD) [3]
Pd Frequency Fractional Mode B
[4]
dC
100
Mhz
Pd Frequency Fractional Mode a (and register
6 [17:16] = 11)
dC
80
Mhz
Pd Frequency integer Mode
dC
125
Mhz
Charge Pump
Output Current
0.02
2.54
ma
Charge Pump gain step size
20
µa
Pd/Charge Pump ssB Phase noise
50 Mhz ref, input referred
1 khz
-143
dBc/hz
10 khz
add 1 dB for Fractional
-150
dBc/hz
100 khz
add 3 dB for Fractional
-153
dBc/hz
Logic Inputs
Vsw
40
50
60
% dVdd
Logic Outputs
VOh Output high Voltage
dVdd
V
VOL Output Low Voltage
0
V
Output impedance
100
200
Ω
Maximum Load Current
1.5
ma
Power Supply Voltages
3.3 V supplies
aVdd, VCChF, VCCPs,
VCCPd, rVdd,dVdd
3.0
3.3
3.5
V
5 V supplies
VPPCP, VddLs, VCC1, VCC2
4.8
5
5.2
V
Power Supply Currents
+5V analog Charge Pump
VPPCP, VddLs
8
ma
+5V VCO Core and VCO Buffer
fo/1 Mode VCC2
105
ma
fo/n Mode VCC2
80
ma
+5V VCO divider and rF/PLL Buffer
fo/1 Mode VCC1
25
ma
fo/n Mode VCC1
80
100
ma
+3.3V
aVdd, VCChF, VCCPs,
VCCPd, rVdd, dVdd3V
52
ma
Power down - Crystal Off
reg 01h=0,
Crystal not Clocked
10
µa
Power down - Crystal On, 100 Mhz
reg 01h=0,
Crystal Clocked 100 Mhz
10
30
ma
Power on Reset
typical reset Voltage on dVdd
700
mV
Min dVdd Voltage for no reset
1.5
V
Power on reset delay
250
µs
VCO Open Loop Phase Noise at fo @ 2 GHz
10 khz Offset
-86
dBc/hz
electrical Specifications (Continued)
[3] slew rate of greater or equal to 0.5 ns/V is recommended, see PLL with integrated rF VCOs Operating guide for more details. Frequency is
guaranteed across process voltage and temperature from -40 °C to 85 °C.
[4] this maximum phase detector frequency can only be achieved if the minimum n value is respected. eg. in the case of fractional feedback
mode, the maximum PFd rate = fvco/20 or 100 Mhz, whichever is less.
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
For price, delivery, and to place orders: Analog Devices, Inc.,
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106
Phone: 781-329-4700 • Order online at www.analog.com
Application Support: Phone: 1-800-ANALOG-D



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