GMS77C1001 datasheet(24/44 Pages) HYNIX

24 / 44 page

GMS77C1000/GMS77C1001

July. 2001 Ver. 1.1

9.3.5 STATUS Register

This register contains the arithmetic status of the ALU, the

RESET status, and the page select bit for program memo-

ries larger than 512 words.

The STATUS register can be the destination for any in-

struction, as with any other register. If the STATUS regis-

ter is the destination for an instruction that affects the Z,

DC or C bits, then the write to these three bits is disabled.

These bits are set or cleared according to the device logic.

Furthermore, the TO and PD bits are not writable. There-

fore, the result of an instruction with the STATUS register

as destination may be different than intended.

It is recommended that only instructions that do not affect

status of CPU be used on STATUS register. Care should be

exercised when writing to the STATUS register as the

ALU status bits are updated upon completion of the write

operation, possibly leaving the STATUS register with a re-

sult that is different than intended. In reset state, the STA-

TUS register is initialized with “00011XXXB”.

9.3.6 FSR Register

The FSR register is an 8-bit register. The lower 5 bits are

used to store indirect address for data memory. The upper

3 bits are unimplemented and read as “0”. Figure 9-9

shows how the FSR register can be used in indirect ad-

dressing mode.

In reset state, the FSR register is initialized with

“1XXX_XXXXB”.

FIGURE 9-8 STATUS REGISTER

PA0

R/W

bit7

bit0

PA0: Program memory page select bits

0 = page 0 (000h - 1FFh) - GMS77C1000/1001

1 = page 1 (200h - 3FFh) - GMS77C1001

TO: Time-overflow bit

1 = After power-up, watchdog clear instruction, or

entering power-down mode

0 = A watchdog timer time-overflow occurred

PD: Power-down bit

1 = After power-up or by the watchdog clear

instruction

0 = By execution of power-down mode

Z: Zero bit

1 = The result of an arithmetic or logic operation

is zero

0 = The result of an arithmetic or logic operation

is not zero

DC: Digit carry/borrow bit

(for addition and subtraction)

addition

1 = A carry from the 4th low order bit of the result

occurred

0 = A carry from the 4th low order bit of the result

did not occur

subtraction

1 = A borrow from the 4th low order bit of the

result did not occur

0 = A borrow from the 4th low order bit of the

result occurred

C: Carry/borrow bit

(for additon,subtraction and rotation)

addition

1 = A carry occurred

0 = A carry did not occur

subtraction

1 = A borrow did not occur

0 = A borrow occurred

rotation

Load bit with LSB or MSB, respectively

R = Readable bit

W = Writable bit

ADDRESS ; 03H

RESET VALUE : 0001_1XXX

GMS77C1001 Datasheet(PDF) 24 Page - Hynix Semiconductor

GMS77C1001 Datasheet(HTML) 24 Page - Hynix Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44

Datasheet Download

Link URL