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AD9705 Datasheet(PDF) 10 Page - Analog Devices |
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AD9705 Datasheet(HTML) 10 Page - Analog Devices |
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10 / 42 page ![]() AD9704/AD9705/AD9706/AD9707 Data Sheet Rev. D | Page 10 of 42 DIGITAL SPECIFICATIONS (1.8 V) TMIN to TMAX, AVDD = 1.8 V, DVDD = 1.8 V, CLKVDD = 1.8 V, IOUTFS = 1 mA, unless otherwise noted. Table 6. AD9707 AD9706 AD9705 AD9704 Parameter Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit DIGITAL INPUTS1 Logic 1 Voltage 1.2 1.8 1.2 1.8 1.2 1.8 1.2 1.8 V Logic 0 Voltage 0 0.5 0 0.5 0 0.5 0 0.5 V Logic 1 Current −10 +10 −10 +10 −10 +10 −10 +10 µA Logic 0 Current +10 +10 +10 +10 µA Input Capacitance 5 5 5 5 pF Input Setup Time, tS, 25°C 2.3 2.3 2.3 2.3 ns Input Hold Time, tH, 25°C 0 0 0 0 ns Input Setup Time, tS, −40°C to +85°C 2.4 2.4 2.4 2.4 ns Input Hold Time, tH, −40°C to +85°C 0.1 0.1 0.1 0.1 ns Latch Pulse Width, tLPW 6.2 6.2 6.2 6.2 ns CLK INPUTS2 Input Voltage Range 0 1.8 0 1.8 0 1.8 0 1.8 V Common-Mode Voltage 0.4 0.9 1.3 0.4 0.9 1.3 0.4 0.9 1.3 0.4 0.9 1.3 V Differential Voltage 0.5 1.5 0.5 1.5 0.5 1.5 0.5 1.5 V 1 Includes CLK+ pin in single-ended clock input mode. 2 Applicable to CLK+ input and CLK– input when configured for differential clock input mode. TIMING DIAGRAM DB0 TO DB13 CLOCK IOUTA OR IOUTB 0.1% 0.1% tLPW tST tPD tH tS Figure 2. Timing Diagram |
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