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US112S Datasheet(PDF) 3 Page - Unisonic Technologies |
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US112S Datasheet(HTML) 3 Page - Unisonic Technologies |
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3 / 4 page ![]() UTC US112S/N SCR UTC UNISONIC TECHNOLOGIES CO., LTD. 3 QW-R301-013,B 12 9 10 Figure.1:Maximum average power dissipation vs average on-state current. 0 11 8 7 6 5 4 3 2 1 0 1 23 45 6 7 89 P(W) 360° α IT(av)(A) α =180° 14 12 Figure.2:Average and D.C. on-state current vs case temperature 0 10 8 6 4 2 0 25 50 75 100 12 5 IT(av)(A) α =180° Tcase(℃) DC Fig.3-2:Relative variation of thermal impedance junction to ambient vs pulseduration (recommended pad layout,FR4 PC board) 2.0 1.6 Figure.4-1:Relative variation of gate trigger current,holding current and latching vs junction temperature (US112S) -40 1.8 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -20 0 20 40 60 80 100 120 140 IGT,IH,IL(TJ)/IGT,IH,IL (TJ=25℃) Tj(℃) IGT IH&IL Rgk=1kΩ Fig.3-1:Relative variation of thermal impedance junction to case vs pulse duration. 0.1 0.5 1.0 1E-2 1E-1 1E+0 1E-3 0.2 K=<Zth(j-c)/Rth(j-c)> tp(s) Figure.4-2: Relative variation of gate trigger current,holding current and latching current vs junction temperature (US112N). 2.4 1.8 2.0 -40 2.2 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 -20 0 20 40 60 80 100 120 140 IGT,IH,IL(TJ)/IGT,IH,IL (TJ=25℃) Tj(℃) IGT IH&IL 0.10 1.00 1E+2 1E-1 5E+2 1E-2 0.01 K=<Zth(j-a)/Rth(j-a)> 1E+0 1E+1 tp(s) |
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