AD5428 datasheet(19/32 Pages) AD

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Data Sheet

AD5428/AD5440/AD5447

Rev. D | Page 19 of 32

SINGLE-SUPPLY APPLICATIONS

Voltage-Switching Mode

Figure 40 shows the DACs operating in voltage switching mode.

The reference voltage, VIN, is applied to the IOUTA pin, and the

output voltage is available at the VREFA terminal. In this config-

uration, a positive reference voltage results in a positive output

voltage, making single-supply operation possible. The output

from the DAC is voltage at constant impedance (the DAC ladder

resistance). Therefore, an op amp is necessary to buffer the

output voltage. The reference input no longer sees constant

input impedance, but one that varies with code. Therefore, the

voltage input should be driven from a low impedance source.

Note that VIN is limited to low voltages because the switches in

the DAC ladder no longer have the same source-drain drive

voltage. As a result, their on resistance differs and degrades the

integral linearity of the DAC. Also, VIN must not go negative by

more than 0.3 V, or an internal diode turns on, causing the device

to exceed the maximum ratings. In this type of application, the full

range of multiplying capability of the DAC is lost.

NOTES

1. ADDITIONAL PINS OMITTED FOR CLARITY.

2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

VDD

VIN

VREFA

VDD

RFBA

GND

VOUT

IOUTA

AGND

Figure 40. Single-Supply Voltage-Switching Mode

ADDING GAIN

In applications where the output voltage must be greater than

VIN, gain can be added with an additional external amplifier, or

it can be achieved in a single stage. Consider the effect of temper-

ature coefficients of the thin film resistors of the DAC. Simply

placing a resistor in series with the RFB resistor causes mismatches

in the temperature coefficients, resulting in larger gain temper-

ature coefficient errors. Instead, the circuit in Figure 41 shows

the recommended method for increasing the gain of the circuit.

R1, R2, and R3 must have similar temperature coefficients, but

they need not match the temperature coefficients of the DAC.

This approach is recommended in circuits where gains of

greater than 1 are required. Note that RFB >> R2||R3 and a gain

error percentage of 100 × (R2||R3)/RFB must be taken into

consideration.

NOTES

1. ADDITIONAL PINS OMITTED FOR CLARITY.

2. C1 PHASE COMPENSATION (1pF TO 2pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

VDD

VIN

VREFA

RFBA

8-/10-/12-BIT

DAC

GND

VOUT

IOUTA

AGND

R2 + R3

GAIN =

R1 =

R2R3

R2 + R3

Figure 41. Increasing Gain of Current Output DAC

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