AD5680 datasheet(17/20 Pages) AD

17 / 20 page

Data Sheet

AD5680

Rev. C | Page 17 of 20

OUTLINE DIMENSIONS

COMPLIANT TO JEDEC STANDARDS MO-178-BA

8°

4°

0°

SEATING

PLANE

1.95

BSC

0.65 BSC

0.60

BSC

3.00

2.90

2.80

3.00

2.80

2.60

1.70

1.60

1.50

1.30

1.15

0.90

0.15 MAX

0.05 MIN

1.45 MAX

0.95 MIN

0.22 MAX

0.08 MIN

0.38 MAX

0.22 MIN

0.60

0.45

0.30

PIN 1

INDICATOR

Figure 38. 8-Lead Small Outline Transistor Package [SOT-23]

(RJ-8)

Dimensions shown in millimeters

TOP VIEW

0.35

0.30

0.25

BOTTOM VIEW

PIN 1 INDEX

AREA

SEATING

PLANE

0.80

0.75

0.70

0.203 REF

0.05 MAX

0.00 MIN

0.65 BSC

1.95 REF

3.10

3.00 SQ

2.90

COPLANARITY

0.08

0.50

0.40

0.30

COMPLIANT

TO JEDEC STANDARDS MO-229-WEEC-2

PIN 1 CORNER

C 0.130× 45°

Figure 39. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD]

3 mm × 3 mm Body, Very Very Thin, Dual Lead

(CP-8-15)

Dimensions shown in millimeters

ORDERING GUIDE

Model1

Power-On

Reset to Code

Accuracy

Temperature Range

Package

Description

Package

Option

Branding

AD5680BRJZ-1500RL7

Zero

±64 LSB INL

−40°C to +105°C

8-Lead SOT-23

RJ-8

D3C

AD5680BRJZ-1REEL7

Zero

±64 LSB INL

−40°C to +105°C

8-Lead SOT-23

RJ-8

D3C

AD5680BRJZ-2500RL7

Midscale

±64 LSB INL

−40°C to +105°C

8-Lead SOT-23

RJ-8

D3D

AD5680BRJZ-2REEL7

Midscale

±64 LSB INL

−40°C to +105°C

8-Lead SOT-23

RJ-8

D3D

AD5680BCPZ-1500RL7

Zero

±64 LSB INL

−40°C to +105°C

8-Lead LFCSP

CP-8-15

DLN

AD5680BCPZ-1RL7

Zero

±64 LSB INL

−40°C to +105°C

8-Lead LFCSP

CP-8-15

DLN

AD5680BCPZ-2500RL7

Midscale

±64 LSB INL

−40°C to +105°C

8-Lead LFCSP

CP-8-15

DLP

AD5680BCPZ-2RL7

Midscale

±64 LSB INL

−40°C to +105°C

8-Lead LFCSP

CP-8-15

DLP

EVAL-AD5680DBZ

Evaluation Board

1 Z = RoHS Compliant Part.

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