PCA9554

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10

Power−On Reset Operation

power−on reset pulse holds the PCA9554 in a reset state

condition is released and the internal state machine and the

PCA9554’s registers are initialized to their default state.

12

34

5

6

7

8

9

SCL

SDA

READ FROM

PORT

DATA INTO

PORT

S

0100 A2

A0

1

A

A1

A

DATA 4

NA P

no acknowledge

from master

acknowledge

from master

acknowledge

from slave

slave address

data from port

start condition

stop

condition

DATA 2

DATA 3

DATA 4

DATA 1

data from port

DATA 1

DATA

S 0100 A2

A0 0

A

A1

0

1

0

0 A2 A1 A0

A

DATA

A

acknowledge from master

acknowledge from slave

slave address

slave address

data from register

COMMAND BYTE

AS

1

acknowledge from slave

acknowledge from slave

At this moment master−transmitter becomes

master−receiver and slave−receiver

becomes slave−transmitter

NA

no acknowledge

from master

data from register

P

last byte

first byte

Figure 11. Read from Register

Figure 12. Read Input Port Register

INT

R/W

R/W

R/W