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Vout + VREF

R1 )

Din

4096 *

tail

(1)

DAC7551

VREFH

DAC7551

Vdac

REF3140

VREF

Vtail

VOUT

OPA4130

DAC7551

SLAS441 – MARCH 2005

down only during the start-up. Once the loop reaches

its steady-state operation, these errors do not affect

loop speed any further. Depending on the ringing

Fixed R1 and R2 resistors can be used to coarsely

characteristics of the loop's transfer function, DAC

set the gain required in the first term of the equation.

glitches can also slow the loop down. With its 1

Once R2 and R1 set the gain to include some

MSPS (small-signal) maximum data update rate,

minimal over-range, a single DAC7551 could be used

DAC7551 can support high-speed control loops.

to set the required offset voltages. Residual errors

Ultralow glitch energy of the DAC7551 significantly

are not an issue for loop accuracy because offset and

improves loop stability and loop settling time.

gain errors could be tolerated. One DAC7551 can

Generating Industrial Voltage Ranges:

provide the Vtail voltages, while four additional

DAC7551 devices can provide Vdac voltages to gener-

For control loop applications, DAC gain and offset

ate four high-voltage outputs. A single SPI interface is

errors are not important parameters. This could be

sufficient to control all five DAC7551 devices in a

exploited to lower trim and calibration costs in a

daisy-chain configuration.

high-voltage control circuit design. Using a quad

operational amplifier (OPA4130), and a voltage refer-

For ±5-V operation: R1 = 10 k

Ω, R2 = 15 kΩ, V

tail =

ence (REF3140), the DAC7551 can generate the

3.33 V, VREF = 4.096 V

wide voltage swings required by the control loop.

For ±10-V operation: R1 = 10 k

Ω, R2 = 39 kΩ, V

tail =

2.56 V, VREF = 4.096 V

For ±12-V operation: R1 = 10 k

Ω, R2 = 49 kΩ, V

tail =

2.45 V, VREF = 4.096 V

Figure 28. Low-cost, Wide-swing Voltage Gener-

ator for Control Loop Applications

The output voltage of the configuration is given by:

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