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NP503 Datasheet(PDF) 3 Page - Nell Semiconductor Co., Ltd

Part # NP503
Description  Power Modules Passivated Assembled Circuit Elements
PDF  7 Pages
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Manufacturer  NELLSEMI [Nell Semiconductor Co., Ltd]
Direct Link  http://www.nellsemi.com
Logo NELLSEMI - Nell Semiconductor Co., Ltd

NP503 Datasheet(HTML) 3 Page - Nell Semiconductor Co., Ltd

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BLOCKING
PARAMETER
SYMBOL
UNIT
TEST CONDITIONS
VALUES
Maximum critical rate of rise of
off-state voltage
dV/dt
T = 125°C, exponential to 0.67 V
, gate open
J
DRM
V/µs
10
200
mA
lRRM,
Maximum peak reverse and off-state
leakage current at V
, V
RRM
DRM
lDRM,
T = 125°C, gate open circuit
J
Maximum peak reverse leakage current
RMS isolation voltage
lRRM
lISOL
T = 25°C
J
50 Hz, circuit to base, all terminals shorted,
T = 25 °C, t = 1s
J
20
2500
µA
V
TRIGGERING
PARAMETER
SYMBOL
UNIT
TEST CONDITIONS
VALUES
PGM
2
VGT
2
10
0.2
mA
8
IGM
A
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak negative gate voltage
Maximum gate voltage required to trigger
Maximum gate current required to trigger
Maximum gate voltage that will not trigger
Maximum gate current that will not trigger
PG(AV)
-VGM
lGT
VGD
lGD
2
T = -40°C
J
T = 25°C
J
T = 125°C
J
T = -40°C
J
T = 25°C
J
T = 125°C
J
T = 125°C, rated V
applied
J
DRM
Anode supply =
6V resistive load
2
60
3
1
90
35
V
mA
V
W
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
SYMBOL
UNIT
TEST CONDITIONS
VALUES
ºC
-40 to 125
1.00
0.10
4
58
2.0
PACK-PAK
(D-19 modified)
g
oz.
Nm
K/W
Maximum junction operating and storage
temperature range
Maximum thermal resistance, junction to case
per junction
Maximum thermal resistance, case to heatsink
(1)
Mounting torque, base to heatsink
Approximate weight
Case style
T , T
J
stg
RthJC
RthCS
DC operation
Mounting surface, smooth and greased
RoHS
RoHS
Nell High Power Products
NP500 Series
www.nellsemi.com
Page 3 of 7
V
Note
(1) A mounting compound is recommended and the torque should be checked after a period of 3 hours to allow for the
spread of the compound



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