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AD74111 Datasheet(PDF) 16 Page - Analog Devices |
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AD74111 Datasheet(HTML) 16 Page - Analog Devices |
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16 / 20 page ![]() REV. 0 –16– AD74111 Table VII. Control Register B Third MCLK Second MCLK First MCLK R/W ADDRESS RES Reserved Divider Divider Divider 15 14, 13, 12, 11 10 9, 8, 7, 6 5, 4 3, 2 1, 0 1 0001 0 0 00 = Divide by 1 00 = Divide by 1 00 = Divide by 1 01 = Divide by 2 01 = Divide by 2 01 = Divide by 2 10 = Divide by 4 10 = Divide by 3 10 = Divide by 3 11 = Divide by 1 11 = Divide by 1 11 = Divide by 1 Table VIII. Control Register C DAC and ADC Low Group DAC ADC High- R/W ADDRESS RES Reserved Word Width Delay De-emphasis Pass Filter 15 14, 13, 12, 11 10 9, 8, 7, 6 5, 4 3 2, 1 0 1 0010 0 0 00 = 16 Bits 0 = Disabled 00 = None 0 = Disabled 01 = 20 Bits 1 = Enabled 01 = 44.1 kHz 1 = Enabled 10 = 24 Bits 10 = 32 kHz 11 = 24 Bits 11 = 48 kHz Table IX. Control Register D Master/ R/W ADDRESS RES Multiframe Sync Reserved DM/MM DSP Mode Fast DCLK Slave 15 14, 13, 12, 11 10 9 8, 7, 6, 5, 4 3 2 1 0 1 0011 0 0 = Normal Mode 0 0 = Data Mode 0 = 16 Bits 0 = 128 fS 0 = Slave 1 = MFS Mode 1 = Mixed Mode 1 = 32 Bits 1 = 256 fS 1 = Master Table VI. Control Register A ADC Input Reference R/W ADDRESS RES Reserved Amplifier ADC DAC Reference Amplifier Reserved 15 14, 13, 12, 11 10 9, 8, 7 6 5 4 3 2 1, 0 1 0000 0 0 0 = Off 0 = Off 0 = Off 0 = Off 0 = Off 0 1 = On 1 = On 1 = On 1 = On 1 = On Function Function Function Function |
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