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MSM6404A/6404VS

¡ Semiconductor

PIN DESCRIPTIONS

Symbol

Type

Description

During reset

P0.0

I/O

"1"

P0.1/SCK

P0.2/SO

P0.3/SI

P1.0/CIN

I/O

P1.0 is shared with counter input (CIN).

"1"

P1.1/TMO

P1.1 is shared with timer output (TMO).

P1.2/TCK

P1.3

P2.0/INT

I

P2.0 is shared with external interrupt input (INT).

The latch is

reset.

P2.1

Input port with a latch, built-in pull-up resistor

P2.2

P2.3

P3.0 to 3.3

"0"

P4.0 to 4.3

P5.0 to 5.3

P6.0 to 6.3

P7.0 to 7.3

I/O

"0"

P8.0 to 8.3

I

Oscillation

waveform

Crystal connection pins for clock oscillation

TEST

O

Pulse output

(Test pin for manufacturer)

RESET

I

Power supply voltage pins

GND

P0.1 is shared with serial clock (SCK) input/output.

P0.2 is shared with serial data (SO) output.

P0.3 is shared with serial data (SI) input.

P1.2 is shared with timer clock input (TCK).

I/O

I/O

I/O

I/O

"1"

"0"

"0"

Input pin for system reset

—

—

—

—

O

—

—

—

8-bit output ports (at OPT instruction execution)

I/O

Note: 1. The ports except for pins P2.0 to P2.3 are pseudo bidirectional ports.

2. When each port is used for output, the MSM6404A can drive one TTL (one input) and

the MSM6404VS can drive one LS TTL (one input).

Upper Pins for MSM6404VS

Symbol

Type

Description

A0 to A12

I0 to I7

CE/GND

I

OE/GND

I

O

I

Data input

Chip enable input

Output enable input

Address output

I

Program input

—

Power supply voltage pins

GND

—

Programed power supply voltage pin