MSM6599B

¡ Semiconductor

8/11

Display data input pins for the 80-bit latch (I). The display data is input at the falling edge of

clock pulse. Table 1 shows the relationship between display data, DF, LCD driver output, and

display.

Table 1

• SHL

Input pin to select the loading direction of display data. Set this pin to "H" or "L" level during

Table 2

Last Data

First Data

Direction of Data Loading

SHL

L

H

Display Data

L

H

L

H

DF

L

L

H

H

LCD Driver Output

Display

OFF

ON

OFF

ON