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Document number: BST-BME680-DS001-00 Revision_1.0_072017

6.4.2 I²C timings

For I²C timings, the following abbreviations are used:



“S&F mode” = standard and fast mode



“HS mode” = high speed mode



Cb = bus capacitance on SDA line

All other naming refers to I²C specification 2.1 (January 2000).

The I²C timing diagram is in Picture 9. The corresponding values are given in Table 18

tHDDAT

tBUF

SDI

SCK

SDI

tLOW

tHDSTA

tSUSTA

tHIGH

tSUDAT

tSUSTO

Picture 9: I2C timing diagram

Table 18: I2C timings

Parameter

Symbol

Condition

Min

Typ

Max

Unit

SDI setup time

tSU;DAT

S&F Mode

HS mode

160

SDI hold time

tHD;DAT

S&F Mode, Cb≤100 pF

S&F Mode, Cb≤400 pF

HS mode, Cb≤100 pF

HS mode, Cb≤400 pF

115

150

SCK low pulse

tLOW

HS mode, Cb≤100 pF

VDDIO = 1.62 V

160

SCK low pulse

tLOW

HS mode, Cb≤100 pF

VDDIO = 1.2 V

210

The above-mentioned I2C specific timings correspond to the following internal added delays:



Input delay between SDI and SCK inputs: SDI is more delayed than SCK by typically 100 ns in Standard and Fast

Modes and by typically 20 ns in High Speed Mode.



Output delay from SCK falling edge to SDI output propagation is typically 140 ns in Standard and Fast Modes and

typically 70 ns in High Speed Mode.

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