MSM6654 datasheet(33/45 Pages) OKI

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¡ Semiconductor

MSM6650 Family

FEDL6650-03

Symbol Type

Description

AGND

—

Analog ground pin.

MCK

Main clock output pin. Use MCK as a connection pin for the MSC1192, etc.

When the IC is in standby status, MCK is held high.

CPU

CPU Mode. Set to "H" level to select Microcontroller Interface Mode.

SERIAL

Serial/Parallel Interface Select. This input selects either the parallel or the

serial input interface. The serial input interface is selected with a high level; the

parallel input interface is selected with a low level.

Chip Enable.

CE is a timing output pin to control read of external memory. This pin outputs

when

RCS is at the "L" level. This pin goes high impedance when RCS is at the "H" level.

RCS

Read Chip Select. The data bits D0-D7 are internally pulled down when

RCS is high.

DGND

—

Digital ground pin.

AVDD

—

Analog power pin. Insert a 0.1

mF or more bypass capacitor between this pin and AGND.

DVDD

—

Digital power pin. Insert a 0.1

mF or more bypass capacitor between this pin and DGND.

D0 - D7

External Memory Data Bus. Data is input when RCS is low. When RCS is high,

these pins become low due to internal pull-down resistors.

RA0 - RA22

External Memory Address. These are address pins for an external memory output

when

RCS is low. These pins become high impedance status if RCS is in "H" level.

TEST1, 2

Test. Set these pins to "H" level.

IBUSY

Outputs a "L" level during playback or when AOUT is at 1/2 VDD (except standby conversion)

STANDBY

Outputs a "L" level during which the device is oscillating.

6 (60)

12 (2)

16 (6)

17 (7)

30 (20)

31 (21)

7 (61)

8 (62)

9 (63)

32, 34-40

(22, 24-30)

41-63

(31-40, 42-54)

15, 64

(5, 55)

18 (8)

20 (10)

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