Electronic Components Datasheet Search
  English  ▼

X  

FS91M68 Datasheet(PDF) 20 Page - Fortune Semiconductor Corp.

Part # FS91M68
Description  8-bit MCU with 1k program ROM
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  FORTUNE [Fortune Semiconductor Corp.]
Direct Link  https://www.ic-fortune.com/eng/index.asp
Logo FORTUNE - Fortune Semiconductor Corp.

FS91M68 Datasheet(HTML) 20 Page - Fortune Semiconductor Corp.

Back Button FS91M68 Datasheet HTML 16Page - Fortune Semiconductor Corp. FS91M68 Datasheet HTML 17Page - Fortune Semiconductor Corp. FS91M68 Datasheet HTML 18Page - Fortune Semiconductor Corp. FS91M68 Datasheet HTML 19Page - Fortune Semiconductor Corp. FS91M68 Datasheet HTML 20Page - Fortune Semiconductor Corp. FS91M68 Datasheet HTML 21Page - Fortune Semiconductor Corp. FS91M68 Datasheet HTML 22Page - Fortune Semiconductor Corp. FS91M68 Datasheet HTML 23Page - Fortune Semiconductor Corp. FS91M68 Datasheet HTML 24Page - Fortune Semiconductor Corp.  
Zoom Inzoom in Zoom Outzoom out
 20 / 24 page
background image
FS91M68
GOTO
Unconditional Branch
Syntax:
GOTOk
0
≤ k ≤ 1FFFh
Operation:
PC
← k
Flag Affected:
None
Description:
The immediate address is
loaded into PC.
Cycle:
2
Example:
GOTO THERE
After instruction:
PC = address (THERE)
INCF
Increment
f
Syntax:
INCF
f, d
0
≤ f ≤ FFh
d
∈ [0,1]
Operation:
[Destination]
← [f] +1
Flag Affected:
Z
Description:
[f] is incremented. If d is 0, the
result is stored in the W register.
If d is 1, the result is stored back
in [f].
Cycle:
1
Example 1:
INCF
OPERAND,0
Before instruction:
W = 88h, OPERAND = 23h
After instruction:
W = 24h, OPERAND = 23h
Example 2:
INCF
OPERAND,1
Before instruction:
W = 88h, OPERAND = 23h
After instruction:
W = 88h, OPERAND = 24h
INCFSZ
Increment f, skip if zero
Syntax:
INCFSZ
f, d
0
≤ f ≤ FFh
d
∈ [0,1]
Operation:
[Destination]
← [f] + 1, skip if the
result is zero
Flag Affected:
None
Description:
[f] is incremented. If d is 0, the
result is stored in the W register.
If d is 1, the result is stored back
in [f].
If the result is 0, then the next
fetched instruction is discarded
and a NOP is executed instead
making it a two-cycle instruction.
Cycle:
1, 2
Example:
Node
INCFSZ FLAG, 1
OP1
:
OP2
:
Before instruction:
PC = address (Node)
After instruction:
[FLAG] = [FLAG] + 1
If [FLAG] = 0
PC = address(OP2)
If [FLAG]
≠ 0
PC = address(OP1)
IORLW
Inclusive OR literal with W
Syntax:
IORLW
k
0
≤ k ≤ FFh
Operation:
[W]
← [W] | k
Flag Affected:
Z
Description:
Inclusive OR the content of the
W register and the eight-bit
literal "k". The result is stored in
the W register.
Cycle:
1
Example:
IORLW
85H
Before instruction:
W = 69h
After instruction:
W = EDh
IORWF
Inclusive OR W with f
Syntax:
IORWF
f, d
0
≤ f ≤ FFh
d
∈ [0,1]
Operation:
[Destination]
← [W] | [f]
Flag Affected:
Z
Description:
Inclusive OR the content of the
W register and [f]. If d is 0, the
result is stored in the W register.
If d is 1, the result is stored back
in [f].
Cycle:
1
Example:
IORWF
OPERAND,1
Before instruction:
W = 88h, OPERAND = 23h
After instruction:
W = 88h, OPERAND = ABh
Rev. 1.3
20/24



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com