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FS91M68 Datasheet(PDF) 20 Page - Fortune Semiconductor Corp. |
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FS91M68 Datasheet(HTML) 20 Page - Fortune Semiconductor Corp. |
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20 / 24 page ![]() FS91M68 GOTO Unconditional Branch Syntax: GOTOk 0 ≤ k ≤ 1FFFh Operation: PC ← k Flag Affected: None Description: The immediate address is loaded into PC. Cycle: 2 Example: GOTO THERE After instruction: PC = address (THERE) INCF Increment f Syntax: INCF f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation: [Destination] ← [f] +1 Flag Affected: Z Description: [f] is incremented. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in [f]. Cycle: 1 Example 1: INCF OPERAND,0 Before instruction: W = 88h, OPERAND = 23h After instruction: W = 24h, OPERAND = 23h Example 2: INCF OPERAND,1 Before instruction: W = 88h, OPERAND = 23h After instruction: W = 88h, OPERAND = 24h INCFSZ Increment f, skip if zero Syntax: INCFSZ f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation: [Destination] ← [f] + 1, skip if the result is zero Flag Affected: None Description: [f] is incremented. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in [f]. If the result is 0, then the next fetched instruction is discarded and a NOP is executed instead making it a two-cycle instruction. Cycle: 1, 2 Example: Node INCFSZ FLAG, 1 OP1 : OP2 : Before instruction: PC = address (Node) After instruction: [FLAG] = [FLAG] + 1 If [FLAG] = 0 PC = address(OP2) If [FLAG] ≠ 0 PC = address(OP1) IORLW Inclusive OR literal with W Syntax: IORLW k 0 ≤ k ≤ FFh Operation: [W] ← [W] | k Flag Affected: Z Description: Inclusive OR the content of the W register and the eight-bit literal "k". The result is stored in the W register. Cycle: 1 Example: IORLW 85H Before instruction: W = 69h After instruction: W = EDh IORWF Inclusive OR W with f Syntax: IORWF f, d 0 ≤ f ≤ FFh d ∈ [0,1] Operation: [Destination] ← [W] | [f] Flag Affected: Z Description: Inclusive OR the content of the W register and [f]. If d is 0, the result is stored in the W register. If d is 1, the result is stored back in [f]. Cycle: 1 Example: IORWF OPERAND,1 Before instruction: W = 88h, OPERAND = 23h After instruction: W = 88h, OPERAND = ABh Rev. 1.3 20/24 |
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