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HT7167 Datasheet(PDF) 3 Page - Shenzhenshi YONGFUKANG Technology co.,LTD |
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HT7167 Datasheet(HTML) 3 Page - Shenzhenshi YONGFUKANG Technology co.,LTD |
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3 / 18 page ![]() HT7167 Synchronous Boost Converter ◼ TERMINAL CONFIGURATION ◼ TERMINAL FUNCTION Terminal No. NAME I/O*1 Description 1 VCC O Output of the internal regulator. A ceramic capacitor of 2.2uF is required between this pin and ground. 2 EN I Enable logic input. Logic high level enables the device. Logic low level disables the device and turns it into shutdown mode. 3 FSW I The switching frequency is programmed by a resister between this pin and the SW pin. 4/5/6/7 SW PWR The switching node pin of the converter. 8 BOOT O Power supply for high-side MOSTFET gate driver. A ceramic capacitor of 0.1μF must be connected between this pin and the SW pin. 9 VIN I IC power supply input. 10 SS O Soft-start programming pin. An external capacitor connected to ground sets the ramp rate of the internal error amplifier’s reference voltage during soft-start 11 DIS O A gate drive output for the external disconnect FET. Connect the DISDRV pin to the gate of the external FET. Leave it floating if not using the load disconnect function. 12 NC - No connection inside the device. Connect these two pins to ground plane on the PCB for good thermal dissipation. 13 MODE I Operation mode selection pin for the device in light load condition. When this pin is connected to ground, the device works in PWM mode. When this pin is left floating, the device works in PFM mode. 14/15/16 VOUT PWR Boost converter output. 17 FB I Voltage feedback. 18 COMP O Output of the internal error amplifier, the loop compensation network should be connected between this pin and the AGND pin. 19 ILIM I Adjustable switch peak current limit. An external resister should be connected between this pin and the AGND pin. 20 AGND - Signal ground of the IC. 0 PGND PWR Power ground of the IC. 1 I: input O: output PWR: power |
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