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AM5728 Datasheet(PDF) 390 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 390 Page - Texas Instruments |
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390 / 415 page ![]() = Rcp Rcp Cac DDR_1V5 0.1 µF A2 A3 AT A2 A3 AT A1 A2 Processor Address and Control Output Buffer DDR Address and Control Input Buffers A3 AT VTT Address and Control Terminator Rtt 390 AM5729, AM5728, AM5726 SPRS953F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Applications, Implementation, and Layout Copyright © 2015–2019, Texas Instruments Incorporated Figure 8-13. ADDR_CTRL Topology for Two DDR3 Devices 8.2.2.15.2.2 CK and ADDR_CTRL Routing, Two DDR3 Devices Figure 8-14 shows the CK routing for two DDR3 devices placed on the same side of the PCB. Figure 8-15 shows the corresponding ADDR_CTRL routing. Figure 8-14. CK Routing for Two Single-Side DDR3 Devices |
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