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AM5728 Datasheet(PDF) 389 Page - Texas Instruments

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Part # AM5728
Description  Sitara Processors Silicon Revision 2.0
PDF  415 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

AM5728 Datasheet(HTML) 389 Page - Texas Instruments

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A1
A2
Processor
Differential Clock
Output Buffer
DDR Differential CK Input Buffers
Routed as Differential Pair
A3
AT
Rcp
Clock Parallel
Terminator
A1
A2
A3
AT
Rcp
Cac
DDR_1V5
0.1 µF
+
–
+ –
+ –
=
Rtt
A2
A3
A4
AT
VTT
A3
389
AM5729, AM5728, AM5726
www.ti.com
SPRS953F – DECEMBER 2015 – REVISED MAY 2019
Submit Documentation Feedback
Product Folder Links: AM5729 AM5728 AM5726
Applications, Implementation, and Layout
Copyright © 2015–2019, Texas Instruments Incorporated
Figure 8-11. ADDR_CTRL Routing for Four Mirrored DDR3 Devices
8.2.2.15.2 Two DDR3 Devices
Two DDR3 devices are supported on the DDR EMIF consisting of two x8 DDR3 devices arranged as one
bank (CS), 16 bits wide, or two x16 DDR3 devices arranged as one bank (CS), 32 bits wide. These two
devices may be mounted on a single side of the PCB, or may be mirrored in a pair to save board space at
a cost of increased routing complexity and parts on the backside of the PCB.
8.2.2.15.2.1 CK and ADDR_CTRL Topologies, Two DDR3 Devices
Figure 8-12 shows the topology of the CK net classes and Figure 8-13 shows the topology for the
corresponding ADDR_CTRL net classes.
Figure 8-12. CK Topology for Two DDR3 Devices



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