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AM5728 Datasheet(PDF) 392 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 392 Page - Texas Instruments |
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392 / 415 page  A1 A2 Processor Differential Clock Output Buffer DDR Differential CK Input Buffer Routed as Differential Pair AT Rcp Clock Parallel Terminator A1 A2 AT Rcp Cac DDR_1V5 0.1 µF + – + – = Rtt A2 A3 AT VTT 392 AM5729, AM5728, AM5726 SPRS953F – DECEMBER 2015 – REVISED MAY 2019 www.ti.com Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Applications, Implementation, and Layout Copyright © 2015–2019, Texas Instruments Incorporated Figure 8-17. ADDR_CTRL Routing for Two Mirrored DDR3 Devices 8.2.2.15.3 One DDR3 Device A single DDR3 device is supported on the DDR EMIF consisting of one x16 DDR3 device arranged as one bank (CS), 16 bits wide. 8.2.2.15.3.1 CK and ADDR_CTRL Topologies, One DDR3 Device Figure 8-18 shows the topology of the CK net classes and Figure 8-19 shows the topology for the corresponding ADDR_CTRL net classes. Figure 8-18. CK Topology for One DDR3 Device |
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