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AM5728 Datasheet(PDF) 387 Page - Texas Instruments |
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AM5728 Datasheet(HTML) 387 Page - Texas Instruments |
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387 / 415 page ![]() = Rcp Rcp Cac DDR_1V5 0.1 µF A2 A3 A4 A3 A2 A3 A4 A3 AT AT A1 A2 Processor Address and Control Output Buffer DDR Address and Control Input Buffers A3 A4 A3 AT VTT Address and Control Terminator Rtt 387 AM5729, AM5728, AM5726 www.ti.com SPRS953F – DECEMBER 2015 – REVISED MAY 2019 Submit Documentation Feedback Product Folder Links: AM5729 AM5728 AM5726 Applications, Implementation, and Layout Copyright © 2015–2019, Texas Instruments Incorporated Figure 8-7. ADDR_CTRL Topology for Four x8 DDR3 Devices 8.2.2.15.1.2 CK and ADDR_CTRL Routing, Four DDR3 Devices Figure 8-8 shows the CK routing for four DDR3 devices placed on the same side of the PCB. Figure 8-9 shows the corresponding ADDR_CTRL routing. Figure 8-8. CK Routing for Four Single-Side DDR3 Devices |
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