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ADUCM331WFS Datasheet(PDF) 5 Page - Analog Devices |
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ADUCM331WFS Datasheet(HTML) 5 Page - Analog Devices |
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5 / 17 page ![]() Data Sheet ADuCM330WFS/ADuCM331WFS Rev. A | Page 5 of 17 SPECIFICATIONS VDD = 3.6 V to 19 V, Arm core frequency (fCORE) = 16.384 MHz, clock divider bits (CD) = 0, normal mode, and voltage reference (VREF) = 1.2 V (internal), unless otherwise stated. Typical values noted reflect the approximate parameter mean at TA = 25°C under nominal conditions, unless otherwise stated. Safe operation of the device is not guaranteed outside the temperature range of TA = −40°C to +115°C. Parameters specified in the 115°C to 125°C temperature range of operation are functional within this range but with degraded performance. Table 1. TA = −40°C to +115°C TA = +115°C to +125°C1 Parameter Test Conditions/Comments Min Typ Max Min Typ Max Unit ADC SPECIFICATIONS Conversion Rate1 ADC normal operating mode, chop off 4 8000 Hz ADC normal operating mode, chop on 4 2000 Hz ADC low power mode, chop on 1 656 Hz Current Channel (IIN+/IIN− Only) No Missing Codes1 Valid for all ADC update rates and ADC modes 20 Bits Integral Nonlinearity (INL)1,2 ADCFLT = 0x10001, 0x08101, 0x00007 −200 ±10 +200 ±80 ppm of FSR Offset Error1,3, 4 Chop off, gain = 4, 8, or 16, external short, after user system calibration at 25°C, 1 LSB = (2.28/gain) µV −100 ±24 +100 LSBs Chop off, gain = 32 or 64, external short, after user system calibration at 25°C, 1 LSB = (2.28/gain) µV −160 ±48 +160 LSBs Chop off, gain = 512, external short, after user system calibration at 25°C, 1 LSB = (2.28/gain) µV −1400 ±60 +1400 LSBs Chop on, external short, low power mode, gain = 64 or 512, processor powered down −300 ±50 +250 ±250 nV Chop on, external short, after user system calibration at 25°C, VDD = 19 V −0.65 +0.65 ±0.1 µV Offset Error Drift1,2,5 Chop off, gain of 4 to 64, normal mode ±0.48 LSB/°C Chop on ±5 ±5 nV/°C Total Gain Error1,3,4,6 Factory calibrated at a gain of 8, normal mode −0.5 ±0.1 +0.5 ±0.15 % Low power mode −1 ±0.2 +1 ±0.2 % Gain Drift1,7 ±3 ±3 ppm/°C PGA Gain Mismatch Error ±0.1 ±0.1 % Output Noise1,8 Register PGASCALE, Bits[11:10] = 0x3 Gain = 64, ADCFLT = 0x08101 0.80 1.3 1.2 µV rms Gain = 64, ADCFLT = 0x00007 0.75 1.1 µV rms Gain = 32, ADCFLT = 0x08101 1.00 1.5 1.3 µV rms Gain = 32, ADCFLT = 0x00007 0.80 1.2 µV rms Gain = 16, ADCFLT = 0x08101 1.50 2.6 2.0 µV rms Gain = 16, ADCFLT = 0x00007 1.10 1.9 µV rms Gain = 8, ADCFLT = 0x08101 2.10 4.1 2.5 µV rms Gain = 8, ADCFLT = 0x00007 1.60 2.4 µV rms Gain = 4, ADCFLT = 0x08101 3.40 5.1 4.0 µV rms Gain = 4, ADCFLT = 0x00007 2.60 3.9 µV rms Gain = 64, ADCFLT = 0x10001 1.55 2.0 1.85 µV rms Gain = 32, ADCFLT = 0x10001 1.6 2.3 2.0 µV rms Gain = 16, ADCFLT = 0x10001 1.8 2.5 2.1 µV rms |
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