| Electronic Components Datasheet Search |
|
HM8563 Datasheet(PDF) 15 Page - Shenzhen Huazhimei Semiconductor Co., Ltd |
|
|
|||||||||||||||||||||||||||||
HM8563 Datasheet(HTML) 15 Page - Shenzhen Huazhimei Semiconductor Co., Ltd |
|
15 / 22 page ![]() • 14 • Fig 9 Acknowledge on the I2C-bus 3.2 I2C of HM8563 Before any data is transmitted on the I2C -bus, the device which should respond is addressed first. The addressing is always carried out with the first byte transmitted after the start procedure. HM8563 acts as a slave receiver or slave transmitter. Therefore the clock signa lSCLis only an input signal, but the data signal SDA is a bidirectional line. HM8563 slavea ddress is shown in Fig 10. Fig 10 Slave address The I2C -bus configuration for the different HM8563 read and write cycles are shown in Fig 11, 12 and 13. The word address is a four bit value that defines which register is to be accessed next. The upper four bits of the word address are not used. Fig 11 Master transmits to slave receiver (write mode) HM8563 |
|
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |