Vref_A

Vref_B

2

19

3

4

5

6

20

EN

18

17

16

15

1

GND

A1

A2

A3

A4

B1

B2

B3

B4

SW

7

8

9

10

14

13

12

11

A5

A6

A7

A8

B5

B6

B7

B8

LSF0108

SW

SW

SW

SW

SW

SW

SW

11

LSF0101, LSF0102, LSF0108

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SDLS966H – DECEMBER 2013 – REVISED JUNE 2019

Product Folder Links: LSF0101 LSF0102 LSF0108

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Copyright © 2013–2019, Texas Instruments Incorporated

Functional Block Diagrams (continued)

Figure 5. LSF0108 Functional Block Diagram

8.3 Feature Description

8.3.1 Auto Bidirectional Voltage Translation

All devices in the LSF family are auto bidirectional voltage level translators that are operational from 0.95 to 4.5 V

on the Vref_A supply and from 1.8 to 5.5 V on the Vref_B supply. This allows bidirectional voltage translation

between 0.95 V and 5.5 V without the need for a direction pin in open-drain or push-pull applications. LSF family

supports level translation applications with transmission speeds greater than 100 Mbps for open-drain systems

using a 30-pF capacitance and 250-Ω pullup resistor. For additional details on the recommended setup and

operation of the LSF family of devices, see the Understanding the LSF Family of Bidirectional, Multi-Voltage

Level Translators training series.

8.3.2 Output Enable

To enable the I/O pins, the EN input should be tied directly to Vref_B during operation. To ensure the high

impedance state during power-up, power-down, or during operation, the EN pin must be LOW. The EN pin

should always be tied directly to the Vref_B pin and is recommended to be disabled by an open-drain driver

without a pullup resistor. For additional details on how to use the enable pin, see the Using the Enable Pin with

the LSF Family video.

(1)

Table 1. Enable Pin Function Table

Data Port State

Tied directly to Vref_B

An = Bn

L

Hi-Z