AD5660 datasheet(16/24 Pages) AD

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AD5620/AD5640/AD5660

Rev. A | Page 16 of 24

TERMINOLOGY

Relative Accuracy

For the DAC, relative accuracy, or integral nonlinearity (INL), is

a measurement of the maximum deviation, in LSBs, from a

straight line passing through the endpoints of the DAC transfer

function. Figure 5 through Figure 7 show typical INL vs. code.

Differential Nonlinearity (DNL)

Differential nonlinearity is the difference between the measured

change and the ideal 1 LSB change between any two adjacent

codes. A specified differential nonlinearity of ±1 LSB maximum

ensures monotonicity. This DAC is guaranteed monotonic by

design. Figure 8 through Figure 10 show typical DNL vs. code.

Zero-Code Error

Zero-code error is a measurement of the output error when

zero code (0x0000) is loaded to the DAC register. Ideally, the

output should be 0 V. The zero-code error is always positive in

the AD5620/AD5640/AD5660, because the output of the DAC

cannot go below 0 V. It is due to a combination of the offset

errors in the DAC and the output amplifier. Zero-code error is

expressed in mV. Figure 19 shows a plot of zero-code error vs.

temperature.

Full-Scale Error

Full-scale error is a measurement of the output error when full-

scale code (0xFFFF) is loaded to the DAC register. Ideally, the

output should be VDD − 1 LSB. Full-scale error is expressed as a

percentage of the full-scale range. Figure 18 shows a plot of full-

scale error vs. temperature.

Gain Error

This is a measurement of the span error of the DAC. It is the

deviation in slope of the DAC transfer characteristic from the

ideal, expressed as a percentage of the full-scale range.

Zero-Code Error Drift

This is a measurement of the change in zero-code error with a

change in temperature. It is expressed in μV/°C.

Gain Temperature Coefficient

This is a measurement of the change in gain error with changes

in temperature. It is expressed in (ppm of full-scale range)/°C.

Offset Error

Offset error is a measurement of the difference between VOUT

(actual) and VOUT (ideal) expressed in mV in the linear region of

the transfer function. Offset error is measured on the AD5660

with Code 512 loaded into the DAC register. It can be negative

or positive.

DC Power Supply Rejection Ratio (PSRR)

This indicates how the output of the DAC is affected by changes

in the supply voltage. PSRR is the ratio of the change in VOUT to

the change in VDD for the full-scale output of the DAC. It is

measured in dB. VREF is held at 2.5 V, and VDD is varied by ±10%.

Output Voltage Settling Time

This indicates the amount of time for the output of a DAC to

settle to a specified level for a ¼ to ¾ full-scale input change. It

is measured from the 24th falling edge of SCLK.

Digital-to-Analog Glitch Impulse

Digital-to-analog glitch impulse is the impulse injected into the

analog output when the input code in the DAC register changes

state. It is normally specified as the area of the glitch in nV-s

and is measured when the digital input code is changed by

1 LSB at the major carry transition (0x7FFF to 0x8000). See

Figure 31 and Figure 32.

Digital Feedthrough

Digital feedthrough is a measurement of the impulse injected

into the analog output of the DAC from the digital inputs of the

DAC, but is measured when the DAC output is not updated. It

is specified in nV-s and measured with a full-scale code change

on the data bus, that is, from all 0s to all 1s or vice versa.

Noise Spectral Density

This is a measurement of the internally generated random

noise. Random noise is characterized as a spectral density

(voltage per √Hz). It is measured by loading the DAC to

midscale and measuring noise at the output. It is measured

in nV/√Hz. Figure 37 shows a plot of noise spectral density.

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