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HD64F2145 Datasheet(PDF) 352 Page - Renesas Technology Corp

Part # HD64F2145
Description  Hitachi 16-Bit Single-Chip Microcomputer
PDF  829 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD64F2145 Datasheet(HTML) 352 Page - Renesas Technology Corp

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Rev. 2.0, 08/02, page 312 of 788
13.4.3
Measurement of 8-Bit Timer Divided Waveform Period
The timer connection facility, TMR_1, and the free-running timer (FRT) can be used to measure
the period of an IHI signal divided waveform. Since TMR_1 can be cleared by a rising edge of the
inverted IVI signal, the rise and fall of the IHI signal divided waveform can be synchronized with
the IVI signal. This enables period measurement to be carried out efficiently.
To measure the period of an IHI signal divided waveform, TCNT in TMR_1 is set to count the
external clock (IHI signal) pulses and to be cleared on the rising edge of the external reset signal
(inverse of the IVI signal). The value to be used as the division factor is written in TCORA, and
the TMO output method is specified by the OS bits in TCSR.
Examples of TCR and TCSR settings in TMR_1, and TCR and TCSR settings in the FRT are
shown in table 13.6, and the timing chart for measurement of the IVI signal and IHI signal divided
waveform periods is shown in figure 13.5. The period of the IHI signal divided waveform is given
by (ICRD(3) – ICRD(2))
× resolution.



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