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HD64F2145 Datasheet(PDF) 376 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 376 Page - Renesas Technology Corp |
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376 / 829 page  Rev. 2.0, 08/02, page 336 of 788 14.6 Usage Notes 14.6.1 Notes on Register Access The watchdog timer’s registers, TCNT and TCSR differ from other registers in being more difficult to write to. The procedures for writing to and reading from these registers are given below. Writing to TCNT and TCSR (Example of WDT_0): These registers must be written to by a word transfer instruction. They cannot be written to by a byte transfer instruction. TCNT and TCSR both have the same write address. Therefore, satisfy the relative condition shown in figure 14.6 to write to TCNT or TCSR. To write to TCNT, the upper bytes must contain the value H’5A and the lower bytes must contain the write data before the transfer instruction execution. To write to TCSR, the upper bytes must contain the value H’A5 and the lower bytes must contain the write data. <TCNT write> <TCSR write> Address : H'FFA8 Address : H'FFA8 H'5A Write data 15 8 7 0 0 H'A5 Write data 15 8 7 0 0 Figure 14.6 Writing to TCNT and TCSR (WDT_0) Reading from TCNT and TCSR (Example of WDT_0): These registers are read in the same way as other registers. The read address is H'FFA8 for TCSR and H'FFA9 for TCNT. |
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