HD64F2145 datasheet(389/829 Pages) RENESAS

389 / 829 page

Rev. 2.0, 08/02, page 349 of 788

15.3.8

Serial Interface Mode Register (SCMR)

SCMR selects SCI functions and its format.

Bit

Bit Name

Initial Value

R/W

Description

7 to

—

All 1

Reserved

These bits are always read as 1 and cannot be

modified.

SDIR

R/W

Data Transfer Direction

Selects the serial/parallel conversion format.

0: TDR contents are transmitted with LSB-first.

Receive data is stored as LSB first in RDR.

1: TDR contents are transmitted with MSB-first.

Receive data is stored as MSB first in RDR.

The SDIR bit is valid only when the 8-bit data

format is used for transmission/reception; when

the 7-bit data format is used, data is always

transmitted/received with LSB-first.

SINV

R/W

Data Invert

Specifies inversion of the data logic level. The

SINV bit does not affect the logic level of the parity

bit. When the parity bit is inverted, invert the O/

(

bit in SMR.

0: TDR contents are transmitted as they are.

Receive data is stored as it is in RDR.

1: TDR contents are inverted before being

transmitted. Receive data is stored in inverted

form in RDR.

1—

Reserved

This bit is always read as 1 and cannot be

modified.

SMIF

R/W

Serial Communication Interface Mode Select:

0: Normal asynchronous or clocked synchronous

mode

1: Reserved mode

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