HD64F2145 datasheet(419/829 Pages) RENESAS

419 / 829 page

Rev. 2.0, 08/02, page 379 of 788

Reception cannot be resumed while a receive error flag is set to 1. Accordingly, clear the ORER,

FER, PER, and RDRF bits to 0 before resuming reception. Figure 15.19 shows a sample flowchart

for serial data reception.

Yes

<End>

[1]

Initialization

Start reception

[2]

Yes

Read RDRF flag in SSR

[4]

[5]

Clear RE bit in SCR to 0

Error processing

(Continued below)

[3]

Read receive data in RDR and

clear RDRF flag in SSR to 0

Yes

ORER = 1

RDRF = 1

All data received?

Read ORER flag in SSR

<End>

Error processing

Overrun error processing

Clear ORER flag in SSR to 0

[3]

[1] SCI initialization:

The RxD pin is automatically

designated as the receive data input

pin.

[2] [3] Receive error processing:

If a receive error occurs, read the

ORER flag in SSR, and after

performing the appropriate error

processing, clear the ORER flag to 0.

Transfer cannot be resumed if the

ORER flag is set to 1.

[4] SCI status check and receive data

read:

Read SSR and check that the RDRF

flag is set to 1, then read the receive

data in RDR and clear the RDRF flag

to 0.

Transition of the RDRF flag from 0 to 1

can also be identified by an RXI

interrupt.

[5] Serial reception continuation

procedure:

To continue serial reception, before

the MSB (bit 7) of the current frame is

received, reading the RDRF flag,

reading RDR, and clearing the RDRF

flag to 0 should be finished.

However, the RDRF flag is cleared

automatically when the DTC is

initiated by a receive data full interrupt

(RXI) and reads data from RDR.

Figure 15.19 Sample Serial Reception Flowchart

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