4

Integrated

Circuit

Systems, Inc.

ICS950703

0690D—05/14/04

Pin Description (Continued)

PIN

PIN

PIN

#

NAME

TYPE

29

VDD3V66

PWR Power pin for the 3V66 clocks.

30

3V66_0

OUT 3.3V 66.66MHz clock output

31

3V66_1

OUT 3.3V 66.66MHz clock output

32

GND3V66

PWR Ground pin for the AGP outputs

33

GND3V66

PWR Ground pin for the AGP outputs

34

3V66_2

OUT 3.3V 66.66MHz clock output

35

3V66_3

OUT 3.3V 66.66MHz clock output

36

VDD3V66

PWR Power pin for the 3V66 clocks.

37

GND

PWR Ground pin.

38

AVDD

PWR 3.3V Analog Power pin for Core PLL

39

IREF

OUT

This pin establishes the reference current for the differential current-mode output pairs. This

pin requires a fixed precision resistor tied to ground in order to establish the appropriate

current. 475 ohms is the standard value.

40

GNDCPU

PWR Ground pin for the CPU outputs

41

CPUCLKC0

OUT

Complimentary clock of differential pair CPU outputs. These are current mode outputs.

External resistors are required for voltage bias.

42

CPUCLKT0

OUT

True clock of differential pair CPU outputs. These are current mode outputs. External

resistors are required for voltage bias.

43

VDDCPU

PWR Supply for CPU clocks, 3.3V nominal

44

CPUCLKC1

OUT

Complimentary clock of differential pair CPU outputs. These are current mode outputs.

External resistors are required for voltage bias.

45

CPUCLKT1

OUT

True clock of differential pair CPU outputs. These are current mode outputs. External

resistors are required for voltage bias.

46

GNDCPU

PWR Ground pin for the CPU outputs

47

CPUCLKC2

OUT

Complimentary clock of differential pair CPU outputs. These are current mode outputs.

External resistors are required for voltage bias.

48

CPUCLKT2

OUT

True clock of differential pair CPU outputs. These are current mode outputs. External

resistors are required for voltage bias.

49

VDDCPU

PWR Supply for CPU clocks, 3.3V nominal

50

CPUCLKC3

OUT

Complimentary clock of differential pair CPU outputs. These are current mode outputs.

External resistors are required for voltage bias.

51

CPUCLKT3

OUT

True clock of differential pair CPU outputs. These are current mode outputs. External

resistors are required for voltage bias.

52

SCLK

IN

Clock pin of SMBus circuitry, 5V tolerant.

53

GNDMREF

PWR Ground pin for the 3VMREF outputs.

54

3VMREF_B

OUT 3V reference output to memory clock driver (180 degree out of phase with 3VMREF)

55

3VMREF

OUT 3V reference output to memory clock driver

56

VDDMREF

PWR Power supply for 3VMREF clocks, nominal 3.3V

* Internal Pull-Up Resistor ** Internal Pull-Down Resistor ~ This output has 2X drive

DESCRIPTION