STR720 datasheet(120/401 Pages) STMICROELECTRONICS

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STR720 - EXTERNAL MEMORY INTERFACE (EMI)

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11.4 Register description

The following paragraphs give detailed descriptions and operations of each of the bits in the

EMI registers.

Bank 0 Configuration Register (BCON0)

Address Offset: 00h

Reset value: 7F3Dh

The Bank 0 Configuration Register (BCON0) is a 16-bit read/write control registers used to

configure the operation of external region 0 (Bank 0). The BCON0 control bits are described

below.

Bit 15

Reserved. This bit must be always written to ‘0’.

Bit 14:8

B_LENGTH[6:0]: Bank 0 Length.

The B_LENGTH field selects the extension of the address region 0 in 64 Kbyte

increments. The following figures are expressed in bytes.

= 0x00. 64K

= 0x01. 128K

= 0x02. 192K

= 0x03. 256K

...

= 0x7F. 8192K (8M)

Bit 7

EREN: External Ready Enable.

This bit selects whether read/write cycle termination is controlled by the “Eready”

input signal.

= 0. Read/Write cycle termination is not controlled by “Eready” signal.

= 1. Read/Write cycle termination is controlled by “Eready” signal.

Bit 6

ISYN0: Internal Synchronization Bank 0.

This bit selects whether the Eready signals, if used, has to be internally

synchronized or not.

= 0. No internal synchronization. It provides the fastest bus cycles but requires

setup and hold times to be met with respect to the EMI internal clock.

= 1. Internal synchronization. Less restrictive, but requires additional wait states

caused by the internal synchronization.

765432

Res.

B_LENGTH[6:0]

EREN

ISYN0

C_LENGTH[2:0]

Res.

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