VSP2264GSJR datasheet(7/63 Pages) TI

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Introduction

SLES059—March 2003

VSP2264

Introduction

1.1

Description

The VSP2264 is a complete mixed-signal IC for CCD signal processing with a CCD timing generator and A/D

converter. The system synchronizes the master clock, HD, and VD. The VSP2264 supports all signal terminals

that the CCD and the vertical driver require. The R driver and H driver synchronize the A/D converter clock

phase to realize ideal performance. The CCD channel has correlated double sampling (CDS) to extract image

information from the CCD output signal. The digital control gain curve is linear in dB, ranging from –6 dB to

42 dB. A black-level clamping circuit ensures black reference level accuracy and speeds black-level recovery

after a gain change. Input signal clamping with a CDS offset adjustment function is available.

1.2

Features

The VSP2264 supports the following features:

•

CCD Signal Processing:

–

Correlated Double Sampling (CDS)

–

Programmable Black-Level Clamping

•

Timing Generator With R and H Drivers

•

Programmable Phase Control:

–

Fine Step: 0.6 ns

–

Wide Step: 8 ns

•

Programmable Gain Amplifier (PGA): –6 dB to 42 dB Gain Range

•

12-Bit Digital Data Output:

–

Up to 25-MHz Conversion Rate

–

No Missing Codes

•

Signal-to-Noise Ratio: 79 dB

•

Portable Operation:

–

Low Voltage: 3.0 V to 3.6 V

–

Low Power: 130 mW at 3.0 V and 20 MHz

–

Standby Plus Power Save-Mode: 39 mW

–

MCLK-Off Mode: 6 mW

•

Recommended CCD: MN39594 (Panasonic)

VSP2264GSJR Datasheet(PDF) 7 Page - Texas Instruments

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