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VSP2264GSJR Datasheet(PDF) 21 Page - Texas Instruments

Part # VSP2264GSJR
Description  CCD SIGNAL PROCESSOR WITH TIMING GENERATOR FOR DIGITAL CAMERAS
PDF  63 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

VSP2264GSJR Datasheet(HTML) 21 Page - Texas Instruments

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Theory of Operation
15
SLES059—March 2003
VSP2264
2.11 Power-Save Mode
For the purpose of power savings, the VSP2264 can be put into the power-save plus standby mode by serial
interface command. In this mode, all the function blocks are disabled, the A/D outputs all go to zero and the
TG output goes to high or low status as determined by the configuration of the serial interface command. The
power consumption drops to 39 mW. Because all the bypass capacitors discharge during this mode, a
substantial time (usually on the order of 200–300 ms) is required to restore from the power-save plus standby
mode.
2.12 Additional Output Delay Control
The VSP2264 can control the delay time of output data by setting registers through the serial interface. In some
cases, the transition of output data affects analog performance. Generally, this is avoided by adjusting the
timing of ADCCK. In case the ADCCK timing cannot be adjusted, the additional output delay control is effective
for reducing the influence of transient noise. Refer to the Serial Interface Timing Specification (Section 3) for
details.
2.13 Voltage Reference
All the reference voltages and bias currents used on the device are created from internal band-gap circuitry.
The CDS and the ADC mainly use three reference voltages, REFP (1.75 V), REFN (1.25 V) and CM (1.5 V).
REFP and REFN are buffered on-chip. CM is derived as the midvoltage of the resistor chain connecting REFP
and REFN internally. The ADC full-scale range is determined by twice the voltage difference between REFP
and REFN.
REFP, REFN, and CM should be heavily decoupled with appropriate capacitors.
Table 2–1. Function Table
OPERATION MODE
FUNCTION
5A CCD†
FUNCTION
FRAME
MONITOR
LONG INTEGRATION (CHDEL)
√
√
POWER SAVE (PWSV)
√
√
STILL (STIL)
√
√
E-SHUTTER
√
√
† Recommended CCD MN39594 (Panasonic)
2.14 Operating Modes
•
Frame mode enables each pixel output with interlace.
•
Monitor mode enables the output of four from every 16 lines.
2.15 Functions
•
The long integration function stops CCD readout (CH1, CH2, CH3, CH4 pulse) at the end of one frame,
as defined by the serial data instruction.
•
The power save function stops all clocks and preserves high or low levels according to the serial data
instruction.
•
The e-shutter function enables electronic shutter operation by the serial data instruction.



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