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P87C151SA Datasheet(PDF) 28 Page - Intel Corporation |
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P87C151SA Datasheet(HTML) 28 Page - Intel Corporation |
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28 / 33 page ![]() 8XC151SASB HIGH-PERFORMANCE CHMOS MICROCONTROLLER PROGRAMMING AND VERIFYING NONVOLATILE MEMORY The 87C151SASB has several areas of nonvolatile memory that can be programmed andor verified on-chip code memory (816 Kbytes) lock bits (3 bits) encryption array (128 bytes) and signature bytes (3 bytes) Figure 16 shows the setup for programming andor verifying the nonvolatile memory Table 11 lists the programming and verification operations and indi- cates which operations apply to the different ver- sions of the 87C151SASB It also specifies the sig- nals on the programming input (PROG ) and the ports The ROMOTPROM mode (port 0) specifies the operation (program or verify) and the base ad- dress of the memory area The addresses (ports 1 and 3) are relative to the base address (On-chip memory for a 16-Kbyte ROMOTPROM device is lo- cated at address range 0000H – 3FFFH The other areas of the ROMOTPROM are outside the memo- ry address space and are accessible only during pro- gramming and verification) Information in Figures 17 and 18 define the configu- ration bits Figure 19 shows the waveforms for the programming and verification cycles and Table 12 lists the timing specifications The signature bytes of the 83C151SASB ROM versions and the 87C151SASB OTPROM versions are factory pro- grammed Table 13 lists the addresses and the con- tents of the signature bytes Factory-programmed ROM and OTPROM versions of 8XC151SASB use configuration byte information supplied in a separate hexadecimal disk file 8XC151SASB devices without internal ROMOTPROM arrays fetch configuration byte in- formation from external application memory based on an internal address range of FFF98H NOTE The VPP source in Figure 16 must be well regu- lated and free of glitches The voltage on the VPP pin must not exceed the specified maximum even under transient conditions 28 |
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