6

ICS93776

0793A—03/08/05

Bytes 2 to 6 are reseved power up default = 1. This allows operation with main clock.

Pin #

Name

0

1

PWD

Bit 7

2, 1

DDR0(T&C)

Output Control

RW

DISABLE ENABLE

1

Bit 6

4, 5

DDR1(T&C)

Output Control

RW

DISABLE ENABLE

1

Bit 5

-

-

Reserved

X

-

-

1

Bit 4

-

-

Reserved

X

-

-

1

Bit 3

13, 14

DDR2(T&C)

Output Control

RW

DISABLE ENABLE

1

Bit 2

26, 27

DDR5(T&C)

Output Control

RW

DISABLE ENABLE

1

Bit 1

-

-

Reserved

X

-

-

1

Bit 0

24, 25

DDR4(T&C)

Output Control

RW

DISABLE ENABLE

1

Note:

Pin #

Name

0

1

PWD

Bit 7

-

-

Reserved

X

-

-

1

Bit 6

16,17

DDR3(T&C)

Output Control

RW

DISABLE ENABLE

1

Bit 5

-

-

Reserved

X

-

-

0

Bit 4

-

-

Reserved

X

-

-

0

Bit 3

-

-

Reserved

RW

-

-

0

Bit 2

-

-

Reserved

X

-

-

0

Bit 1

-

-

Reserved

RW

-

-

0

Bit 0

-

-

Reserved

X

-

-

0

Note:

Control Function

Affected Pin

BYTE

0

BYTE

1

PWD = Power Up Default

PWD = Power Up Default

Type

Bit Control

Type

Control Function

Affected Pin

Bit Control