L5970AD

6/11

3.4 CURRENT PROTECTION

The L5970AD has two current limit protections, pulse by pulse and frequency fold back.

The schematic of the current limitation circuitry for the pulse by pulse protection is shown in figure 7.

The output power PDMOS transistor is split in two parallel PDMOS. The smallest one has a resistor in series,

PDMOS is switched off until the next falling edge of the internal clock pulse.

Due to this reduction of the ON time, the output voltage decreases.

Since the minimum switch ON time (necessary to avoid false overcurrent signal) is not enough to obtain a suf-

ficiently low duty cycle at 500KHz, the output current, in strong overcurrent or short circuit conditions, could in-

crease again. For this reason the switching frequency is also reduced, so keeping the inductor current under its

maximum threshold. The Frequency Shifter (see fig. 6) depends on the feedback voltage. As the feedback volt-

age decreases (due to the reduced duty cycle), the switching frequency decreases too.

Figure 7. Current Limitation Circuitry

3.5 ERROR AMPLIFIER

The voltage error amplifier is the core of the loop regulation. It is a transconductance operational amplifier whose

non inverting input is connected to the internal voltage reference (1.235V), while the inverting input (FB) is con-

nected to the external divider or directly to the output voltage. The output (COMP) is connected to the external

compensation network.

The uncompensated error amplifier has the following characteristics:

The error amplifier output is compared with the oscillator sawtooth to perform PWM control.

3.6 PWM COMPARATOR AND POWER STAGE

This block compares the oscillator sawtooth and the error amplifier output signals generating the PWM

signal for the driving stage.

The power stage is a very critical block cause it has to guarantee a correct turn on and turn off of the PD-

MOS.

Transconductance

2300

µS

Low frequency gain

65dB

Minimum sink/source voltage

1500

µA/300µA

Output voltage swing

0.4V/3.65V

Input bias current

2.5

µA

DRIVER

NOT

A1

PWM

VCC

OUT

A1/A2=95

RSENSE

D00IN1134

I

I

RTH

A2