L5970AD

4/11

3

Functional Description

The main internal blocks are shown in Fig. 4, where is reported the device block diagram. They are:

●

A voltage regulator that supplies the internal circuitry. From this regulator, a 3.3V reference

voltage is externally available.

●

A voltage monitor circuit that checks the input and internal voltages.

●

A fully integrated sawtooth oscillator whose frequency is500KHz

●

Two embedded current limitations circuitries which control the current that flows through the

power switch. The Pulse by Pulse Current Limit forces the power switch OFF cycle by cycle

if the current reaches an internal threshold, while the Frequency Shifter reduces the switch-

ing frequency in order to strongly reduce the duty cycle.

●

A transconductance error amplifier.

●

A pulse width modulator (PWM) comparator and the relative logic circuitry necessary to drive

the internal power.

●

An high side driver for the internal P-MOS switch.

●

An inhibit block for stand-by operation.

●

A circuit to realize the thermal protection function.

Figure 4. Block Diagram

3.1 POWER SUPPLY & VOLTAGE REFERENCE

The internal regulator circuit (shown in Figure 2) consists of a start-up circuit, an internal voltage Prereg-

ulator, the Bandgap voltage reference and the Bias block that provides current to all the blocks.

The Starter gives the start-up currents to the whole device when the input voltage goes high and the de-

vice is enabled (inhibit pin connected to ground).

supply voltage noise sensitivity.

3.2 VOLTAGES MONITOR

INHIBIT

VOLTAGES

MONITOR

PEAK TO PEAK

CURRENT LIMIT

THERMAL

SHUTDOWN

E/A

PWM

1.235V

+

-

-

+

OSCILLATOR

D

Ck

Q

FREQUENCY

SHIFTER

TRIMMING

SUPPLY

1.235V

3.5V

DRIVER

BUFFER

LPDMOS

POWER

FB

SYNC

COMP

INH

VREF

GND

OUT

VCC

D00IN1125