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PMWD30UN Datasheet(PDF) 9 Page - NXP Semiconductors |
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PMWD30UN Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 12 page ![]() Philips Semiconductors PMWD30UN Dual µTrenchMOS™ ultra low level FET Product data Rev. 01 — 22 January 2003 9 of 12 9397 750 10835 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 6. Package outline Fig 14. SOT530-1 (TSSOP8). UNIT A1 A max. A2 A3 bp L HE Lp wy v ce D(1) E(2) Z(1) θ REFERENCES OUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC EIAJ mm 0.15 0.05 0.95 0.85 0.30 0.19 0.20 0.13 3.10 2.90 4.50 4.30 0.65 6.50 6.30 0.70 0.35 8 ° 0 ° 0.10 0.10 0.10 0.94 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.70 0.50 SOT530-1 MO-153 99-12-27 00-02-24 w M bp D Z e 0.25 14 8 5 θ A A2 A1 Lp (A3) detail X L HE E c v M A X A y 2.5 5 mm 0 scale TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm SOT530-1 1.10 pin 1 index |
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