CS4265 datasheet(21/53 Pages) CIRRUS

21 / 53 page

CS4265

DS657A2

TYPICAL CONNECTION DIAGRAM

VLS

10 µF

+3.3V to +5V

47 µF

FILT+

0.1 µF

10 µF

0.1 µF

10 µF

0.1 µF

+1.8V

to +5V

DGND

VLC

0.1 µF

+1.8V

to +5V

SCL

SDA

RST

2 k

Ω

Note 1

LRCK

SDIN1

AGND

Digital Audio

Processor

Micro-

Controller

MCLK

SCLK

0.1 µF

* Capacitors must be C0G or equivalent

Digital Audio

Output

2.2nF

AFILTA

AFILTB

MICIN1

MICIN2

Microphone Input 1

Microphone Input 2

2.2nF

SDIN2

TXOUT

TXSDIN

SDOUT

CS4265

2 k

Ω

0.1 µF

10 µF

MICBIAS

+3.3V to +5V

SGND

Signal Ground

MUTEC

Mute

Drive

AOUTA

AOUTB

470

Ω

470

Ω

3.3 µF

Optional

Analog

Muting

3.3 µF

10 k

Ω

10 k

Ω

ext

See Note 2

AIN1A

Left Analog Input 1

10 µF

1800 pF

100 k

Ω

100 k

Ω

100

Ω

100

Ω

AIN1B

Right Analog Input 1

10 µF

Note 1: Resistors are required for I²C control

port operation

For best response to Fs/2 :

()

470

ext

This circuitry is intended for applications where the CS4265

connects directly to an unbalanced output of the design. For

internal routing applications please see the DAC Analog Output

Characteristics section for loading limitations.

Note 2 :

Note 3

Note 3: The value of R

L is dictated by the

microphone carteridge.

0.1 µF

AGND

47 k

Ω

Note 4: Sets the LSB of the 7-bit chip address.

See the I²C Control Port Description and

Timing section.

Note 4

Figure 9. Typical Connection Diagram

CS4265 Datasheet(PDF) 21 Page - Cirrus Logic

CS4265 Datasheet(HTML) 21 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

Datasheet Download

Link URL