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CS42448 Datasheet(PDF) 46 Page - Cirrus Logic

Part # CS42448
Description  108 dB, 192 kHz 6-in, 8-out CODEC
PDF  70 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS42448 Datasheet(HTML) 46 Page - Cirrus Logic

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46
DS648PP2
6.4
FUNCTIONAL MODE (ADDRESS 03H)
6.4.1
DAC FUNCTIONAL MODE (DAC_FM[1:0])
Default = 11
Master Mode
00 - Single-Speed Mode (4 to 50 kHz sample rates)
01 - Double-Speed Mode (50 to 100 kHz sample rates)
10 - Quad-Speed Mode (100 to 200 kHz sample rates)
Slave Mode
11 - (Auto-detect sample rates)
Function:
Selects the required range of sample rates for the DAC serial port.
6.4.2
ADC FUNCTIONAL MODE (ADC_FM[1:0])
Default = 11
Master Mode
00 - Single-Speed Mode (4 to 50 kHz sample rates)
01 - Double-Speed Mode (50 to 100 kHz sample rates)
10 - Quad-Speed Mode (100 to 200 kHz sample rates)
Slave Mode
11 - (Auto-detect sample rates)
Function:
Selects the required range of sample rates for the ADC serial port.
6.4.3
MCLK FREQUENCY (MFREQ[2:0])
Default = 000
Function:
Sets the appropriate frequency for the supplied MCLK. For TDM and OLM #2 operation,
ADC/DAC_SCLK must equal 256Fs. For OLM #1 operation, ADC/DAC_SCLK must equal 128Fs.
MCLK can be equal to or greater than the higher frequency of ADC_SCLK or DAC_SCLK.
7
654
32
10
DAC_FM1
DAC_FM0
ADC_FM1
ADC_FM0
MFreq2
MFreq1
MFreq0
Reserved
Ratio (xFs)
MFreq2
MFreq1
MFreq0
Description
SSM
DSM
QSM
00
0
1.0290 MHz to 12.8000 MHz
256
128
64
00
1
1.5360 MHz to 19.2000 MHz
384
192
96
01
0
2.0480 MHz to 25.6000 MHz
512
256
128
01
1
3.0720 MHz to 38.4000 MHz
768
384
192
1X
X
4.0960 MHz to 51.2000 MHz
1024
512
256
Table 10. MCLK Frequency Settings for I
²S, Left and Right Justified Interface Formats



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