31 / 48 page
ASLIC/ASLAC Products
31
SWITCHING CHARACTERISTICS
Microprocessor Interface
Min. and Max. values are valid for all digital outputs with a 100 pF load, except DI/O, DXA, and DXB, which are valid
with 150 pF loads.
Table 7. Microprocessor Interface
No.
Symbol
Parameter
Min
Typ
Max
Units
Note
1tDCY
Data clock period
244
ns
2tDCH
Data clock High pulse width
97
ns
1
3tDCL
Data clock Low pulse width
97
ns
1
4tDCR
Rise time of clock
25
ns
5tDCF
Fall time of clock
25
ns
6tICSS
Chip select setup time, Input mode
70
tDCY – 10
ns
7tICSH
Chip select hold time, Input mode
0
tDCH – 20
ns
8tICSL
Chip select pulse width, Input mode
8tDCY
ns
9tICSO
Chip select off time, Input mode
5
µs
1, 7
10
tIDS
Input data setup time
30
ns
6
11
tIDH
Input data hold time
30
ns
12
tOLH
SLIC output latch valid
0
1.2
1.9
µs
13
tOCSS
Chip select setup time, Output mode
70
tDCY – 10
ns
14
tOCSH
Chip select hold time, Output mode
0
tDCH – 20
ns
15
tOCSL
Chip select pulse width, Output mode
8tDCY
ns
16
tOCSO
Chip select off time, Output mode
5
µs
1, 7
17
tODD
Output data turn on delay
50
ns
18
tODH
Output data hold time
3
ns
19
tODOF
Output data turn off delay
50
ns
20
tODC
Output data valid
0
50
ns
21
tRST
Reset pulse width
50
µs
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