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EL4095CS Datasheet(PDF) 11 Page - Intersil Corporation |
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EL4095CS Datasheet(HTML) 11 Page - Intersil Corporation |
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11 / 19 page ![]() 11 Stray capacitance at each -VIN terminal should absolutely be minimized, especially in a positive-gain mode, or peaking will occur. Similarly, the load capacitance should be minimized. If more than 25pF of load capacitance must be driven, a load resistor from 100 Ω to 400Ω can be added in parallel with the output to reduce peaking, but some bandwidth degradation may occur. A “snubber” load can alternatively be used. This is a resistor in series with a capacitor to ground, 150 Ω and 100pF being typical values. The advantage of a snubber is that it does not draw DC load current. A small series resistor, low tens of ohms, can also be used to isolate reactive loads. Distortion The signal voltage range of the +VIN terminals is within 3.5V of either supply rail. One must also consider the range of error currents that will be handled by the -VIN terminals. Since the -VIN of a CFA is the output of a buffer which replicates the voltage at +VIN, error currents will flow into the -VIN terminal. When an input channel has 100% gain assigned to it, only a small error current flows into its negative input; when low gain is assigned to the channel the output does not respond to the channel’s signal and large error currents flow. Here are a few idealized examples, based on a gain of +1 for channels A and B and RF = 1kΩ for different gain settings: Thus, either -VIN can receive up to 1mA error current for 1V of input signal and 1k Ω feedback resistors. The maximum error current is 3mA for the EL4095, but 2mA is more realistic. The major contributor of distortion is the magnitude of error currents, even more important than loading effects. The performance curves show distortion versus input amplitude for different gains. If maximum bandwidth is not required, distortion can be reduced greatly (and signal voltage range enlarged) by increasing the value of RF and any associated gain-setting resistor. FIGURE 1. EL4095 IN INVERTING CONNECTION Gain VINA VINB I (-VINA)I (-VINB)VOUT 100% 1V 0 0 1mA 1V 75% 1V 0 -250µA 750µA 0.75V 50% 1V 0 -500µA 500µA 0.5V 25% 1V 0 -750µA 250µA 0.25V 0% 1V 0 -1mA 0 0V EL4095 |
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