AM79C930 datasheet(80/161 Pages) AMD

80 / 161 page

AMD

P R E L I M I N A R Y

Am79C930

SIR5: I/O Data Port B (IODPB)

This register is a system interface I/O address alias of

I/O Data Port A.

Bit

Name

Reset Value

Description

7:0

IODPB[7:0]

–

Aliased to I/O Data Port A.

SIR6: I/O Data Port C (IODPC)

This register is a system interface I/O address alias of

I/O Data Port A.

Bit

Name

Reset Value

Description

7:0

IODPC[7:0]

–

Aliased to I/O Data Port A.

SIR7: I/O Data Port D (IODPD)

This register is a system interface I/O address alias of

I/O Data Port A.

Bit

Name

Reset Value

Description

7:0

IODPD[7:0]

–

Aliased to I/O Data Port A.

MAC Interface Registers (MIR Space)

The MAC Interface Unit Register (MIR) space contains

16 registers which are used by the firmware to allow

communication between the firmware (MAC layer) and

the device driver. This register set also contains the

power down registers. These registers are only accessi-

ble through the 80188 core; they are inaccessible from

the system interface.

MIR0: Processor Interface Register (PIR)

This register is used to communicate to and from the

driver at the system interface.

Bit

Name

Reset Value

Description

SIDA

System Interface Direct Access. When SIDA is set to 1, then the

system interface side of the BIU is in direct memory access mode,

such that system interface access cycles will have direct access to

the Am79C930 memory interface. This mode should only be in-

voked if the 80188 will be placed into HALT mode by an appropriate

instruction within the 80188 firmware during the time that SIDA is

set to 1. When SIDA is reset to 0, then system interface accesses to

the Am79C930 memory interface will be translated by the internal

BIU arbitration state machine.

ECMRMS

Embedded Controller Memory Resource Mapping Scheme. When

ECMRMS is set to 1, the top 96K of Flash memory is mapped to

80188 memory locations 8000h to 1FFFFh. All of Flash memory is

still available at the “normal” locations E0000h to FFFFFh. When

ECMRMS is reset to 0, Flash memory is mapped only to locations

E0000h to FFFFFh.

SPDREQ

System Power Down Request. SPDREQ will indicate a 1 when the

device driver writes a 1 to the PCMCIA Power Down Request bit in

the PCMCIA Card Configuration and Status Register or when the

device driver writes a 1 to the SIR3 ISAPWRDWN bit. When

SPDREQ is a 1, an interrupt to the 80188 will be generated.

SPDREQ will become cleared when the 80188 core writes a 1

to SPDREQ.

AM79C930 Datasheet(PDF) 80 Page - Advanced Micro Devices

AM79C930 Datasheet(HTML) 80 Page - Advanced Micro Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL