VT8371 datasheet(4/11 Pages) ETC1

4 / 11 page

VT8371

Preliminary Revision 1.02, January 7, 2000

-ii-

Table of Contents

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TABLE OF CONTENTS

REVISION HISTORY........................................................................................................................................................................I

TABLE OF CONTENTS .................................................................................................................................................................. II

LIST OF FIGURES..........................................................................................................................................................................III

LIST OF TABLES ...........................................................................................................................................................................IV

KX133 AMD ATHLON™ NORTH BRIDGE................................................................................................................................. 1

OVERVIEW ....................................................................................................................................................................................... 4

PINOUTS ............................................................................................................................................................................................ 6

PIN DESCRIPTIONS ........................................................................................................................................................................ 9

REGISTERS ..................................................................................................................................................................................... 17

REGISTER OVERVIEW ................................................................................................................................................................. 17

MISCELLANEOUS I/O................................................................................................................................................................... 20

CONFIGURATION SPACE I/O ....................................................................................................................................................... 20

REGISTER DESCRIPTIONS............................................................................................................................................................ 21

Device 0 Header Registers - Host Bridge ............................................................................................................................ 21

Device 0 Configuration Registers - Host Bridge ................................................................................................................ 23

Host CPU Control ................................................................................................................................................................................. 23

DRAM Control ..................................................................................................................................................................................... 24

PCI Bus Control.................................................................................................................................................................................... 30

GART / Graphics Aperture Control ...................................................................................................................................................... 34

AGP Control ......................................................................................................................................................................................... 36

Device 1 Header Registers - PCI-to-PCI Bridge ................................................................................................................ 40

Device 1 Configuration Registers - PCI-to-PCI Bridge..................................................................................................... 42

AGP Bus Control .................................................................................................................................................................................. 42

ELECTRICAL SPECIFICATIONS ............................................................................................................................................... 45

ABSOLUTE MAXIMUM RATINGS ................................................................................................................................................. 45

DC CHARACTERISTICS................................................................................................................................................................ 45

AC TIMING SPECIFICATIONS ...................................................................................................................................................... 45

MECHANICAL SPECIFICATIONS ............................................................................................................................................. 46

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