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XRT7250 Datasheet(PDF) 246 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 246 Page - Exar Corporation |
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246 / 463 page ![]() áç áç áç áç DS3/E3 FRAMER IC XRT7250 REV. 1.1.1 227 Whenever the Terminal Equipment encounters the Change in Idle Condition Receive Interrupt, it should do the following. 1. It should determine the current state of the Idle condition. Recall, that this interrupt can gener- ated, whenever the XRT7250 Framer declares or clears the Idle condition. Hence, the user can determine the current state of the Idle condition by reading the state of Bit 5 (RxIdle), within the RxDS3 Configuration & Status Registers, as illus- trated below 4.3.6.2.5 The Change of State of Receive FERF Interrupt If the Change of State on Receive FERF Interrupt is enabled, then the XRT7250 Framer IC will generate an interrupt in response to either of the following con- ditions. 1. When the XRT7250 Framer IC detects the FERF indicator, in the incoming DS3 data stream, and 2. When the XRT7250 Framer IC no longer detects the FERF indicator, in the incoming DS3 data stream. Conditions causing the XRT7250 Framer IC to de- clare an FERF (Far-End-Receive Failure) condi- tion • If the Receive DS3 Framer block (within the XRT7250 Framer IC) detects some incoming DS3 frames with both of the “X” bits set to “0”. Conditions causing the XRT7250 Framer IC to clear the FERF condition. • Whenever, the Receive DS3 Framer block starts to detect some incoming DS3 frames, in which the “X” bits are not set to “0”. Enabling and Disabling the Change of State on Receive FERF Interrupt: The user can enable or disable the Change of State on Receive FERF Interrupt, by writing the appropriate value into Bit 3 (FERF Interrupt Enable) within the RxDS3 Interrupt Enable Register, as illustrated below. Setting this bit-field to “1” enables this interrupt. Con- versely, setting this bit-field to “0” disables this inter- rupt. Servicing the Change of State on Receive FERF Interrupt RXDS3 INTERRUPT STATUS REGISTER (ADDRESS = 0X13) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 CP-Bit Error Interrupt Status LOS Interrupt Status AIS Interrupt Status Idle Interrupt Status FERF Interrupt Status AIC Interrupt Status OOF Interrupt Status P-Bit Error Interrupt Status RUR RUR RUR RUR RUR RUR RUR RUR 0 0010 000 RXDS3 CONFIGURATION & STATUS REGISTER (ADDRESS = 0X10) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 RxAIS RxLOS RxIdle RxOOF Reserved Framing On Parity FSync Algo MSync Algo RO RO RO RO RO RO RO RUR 0 0000 000 RXDS3 INTERRUPT ENABLE REGISTER (ADDRESS = 0X12) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 CP Bit Error Interrupt Enable LOS Interrupt Enable AIS Interrupt Enable Idle Interrupt Enable FERF Interrupt Enable AIC Interrupt Enable OOF Interrupt Enable P-Bit Error Interrupt Enable R/W R/W R/W R/W R/W R/W R/W R/W 0 0000 000 |
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