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XRT7250 Datasheet(PDF) 248 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 248 Page - Exar Corporation |
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248 / 463 page  áç áç áç áç DS3/E3 FRAMER IC XRT7250 REV. 1.1.1 229 Whenever the Terminal Equipment encounters this in- terrupt, it should do the following. • It should continue to check the state of the AIC bit, in order to see if this change is constant. • If this change is constant, then the user should con- figure the XRT7250 Framer IC to operate in the M13 framing format, if the AIC bit-field is “0”. • Conversely, if the AIC bit-field is “1”, then the user should configure the XRT7250 Framer IC to oper- ate in the C-bit Parity framing format. 4.3.6.2.7 The Detection of P-Bit Error Interrupt If the Detection of P-Bit Error Interrupt is enabled, then the XRT7250 Framer IC will generate an inter- rupt, anytime the Receive DS3 Framer block has de- tected a P-bit error, within the incoming DS3 data stream. Enabling and Disabling the Detection of P-Bit Er- ror Interrupt: The user can enable or disable the Detection of P-Bit Error Interrupt, by writing the appropriate value into Bit 0 (P-Bit Error Interrupt Enable) within the RxDS3 Interrupt Enable Register, as illustrated below. Setting this bit-field to “1” enables this interrupt. Con- versely, setting this bit-field to “0” disables this inter- rupt. Servicing the Detection of P-Bit Error Interrupt Whenever the XRT7250 Framer IC detects this inter- rupt, it will do all of the following. • It will assert the Interrupt Request output pin (INT) by driving it "High". • It will set Bit 0 (P-Bit Error Interrupt Status) within the Rx DS3 Interrupt Status Register, to “1”, as indi- cated below. Whenever the Terminal Equipment encounters the Detection of P-bit Error Interrupt, It should read the contents of PMON Parity Error Count Register (locat- ed at 0x54 and 0x55), in order to determine the num- ber of P-bit errors recently received. RXDS3 INTERRUPT STATUS REGISTER (ADDRESS = 0X13) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 CP-Bit Error Interrupt Status LOS Interrupt Status AIS Interrupt Status Idle Interrupt Status FERF Interrupt Status AIC Interrupt Status OOF Interrupt Status P-Bit Error Interrupt Status RUR RUR RUR RUR RUR RUR RUR RUR 0 0000 100 RXDS3 INTERRUPT ENABLE REGISTER (ADDRESS = 0X12) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 CP Bit Error Interrupt Enable LOS Interrupt Enable AIS Interrupt Enable Idle Interrupt Enable FERF Interrupt Enable AIC Interrupt Enable OOF Interrupt Enable P-Bit Error Interrupt Enable R/W R/W R/W R/W R/W R/W R/W R/W 0 0000 000 RXDS3 INTERRUPT STATUS REGISTER (ADDRESS = 0X13) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 CP-Bit Error Interrupt Status LOS Interrupt Status AIS Interrupt Status Idle Interrupt Status FERF Interrupt Status AIC Interrupt Status OOF Interrupt Status P-Bit Error Interrupt Status RUR RUR RUR RUR RUR RUR RUR RUR 0 0000 001 |
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