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XRT7250 Datasheet(PDF) 250 Page - Exar Corporation |
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XRT7250 Datasheet(HTML) 250 Page - Exar Corporation |
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250 / 463 page ![]() áç áç áç áç DS3/E3 FRAMER IC XRT7250 REV. 1.1.1 231 Setting this bit-field to “1” enables this interrupt. Con- versely, setting this bit-field to “0” disables this inter- rupt. Servicing the Receive FEAC Message - Validation Interrupt. Whenever the XRT7250 Framer IC generates this in- terrupt, it will do the following. • It will assert the Interrupt Request output pin (INT) by driving it "Low". • It will set Bit 0 (RxFEAC Valid Interrupt Status), within the RxDS3 FEAC Interrupt Enable/Status Register to “1”, as indicated below. • It will write the contents of this validated FEAC Message into the Rx DS3 FEAC Register, as indi- cated below. Whenever the Terminal Equipment encounters the Receive FEAC Message - Validation Interrupt, then it should do the following. • It should read the contents of the High RxDS3 FEAC Register, and respond accordingly. 4.3.6.2.10 The Receive FEAC Message - Removal Interrupt if the Receive FEAC Message - Removal Interrupt is enabled, then the XRT7250 Framer IC will generate an interrupt any time the High Receive FEAC Proces- sor removes a new FEAC (Far-End Alarm & Control) Message. In particular, the Receive FEAC Processor will re- move a FEAC Message, it has received a different FEAC Message (from the most recently validated message) in 3 of the last 10 FEAC Message recep- tions. Enabling/Disabling the Receive FEAC Message - Removal Interrupt The user can enable or disable the Receive FEAC Message - Removal Interrupt, by writing the appropri- ate data into Bit 1 (RxFEAC Remove Interrupt En- able) within the RxDS3 FEAC Interrupt Enable/Status Register, as indicated below. RXDS3 FEAC INTERRUPT ENABLE/STATUS REGISTER (ADDRESS = 0X17) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used FEAC Valid RxFEAC Remove Interrupt Enable RxFEAC Remove Interrupt Status RxFEAC Valid Interrupt Enable RxFEAC Valid Interrupt Status RO RO RO RO R/W RUR R/W RUR 0 0000 0 X 0 RXDS3 FEAC INTERRUPT ENABLE/STATUS REGISTER (ADDRESS = 0X17) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used FEAC Valid RxFEAC Remove Interrupt Enable RxFEAC Remove Interrupt Status RxFEAC Valid Interrupt Enable RxFEAC Valid Interrupt Status RO RO RO RO R/W RUR R/W RUR 0 0000 011 RXDS3 FEAC REGISTER (ADDRESS = 0X16) BIT 7BIT 6BIT 5BIT 4BIT 3BIT 2BIT 1BIT 0 Not Used RxFEAC[5:0] Not Used RO RO RO RO R/O R/O R/O R/O 0 0000 000 |
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