97SD3232 datasheet(4/39 Pages) MAXWELL

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97SD3232

All data sheets are subject to change without notice

1 Gb (8-Meg X 32-Bit X 4-Banks) SDRAM

01.11.05 Rev 2

Standby Current in non power down6

CC2N

CKE, CS = V

CK = 12 ns

1, 2, 3

Standby Current in non power down7

( Input signal stable)

CC2NS

CKE = V

CK = 0

1, 2, 3

Active standby current in1,2,4

power down

CC3P

CKE = V

CK = 12 ns

1, 2, 3

Active standby current in power down

(input signal stable)2,5

CC3PS

CKE = V

CK = 0

1, 2, 3

Active standby power in non power

down1,2,6

CC3N

CKE, CS1-4 = V

CK = 12 ns

1, 2, 3

120

Active standby current in non power

down ( input signal stable)2,7

CC3NS

CKE = V

CK = 0

1, 2, 3

Burst Operating Current1,2,8

CAS Latency = 2

CAS Latency = 3

CC4

CK = min

BL = 4

1, 2, 3

440

580

Refresh Current3

CC5

RC = min

1, 2, 3

880

Self Refresh current9

CC6

IH>VCC - 0.2V

IL < 0.2 V

1, 2, 3

Input Leakage Current - CLK

0<V

LI<VCC

1, 2, 3

-2

Input Leakage Current - All Other

0<V

LI<VCC

1, 2, 3

-4

Output Leakage Current

0<V

LO<VCC

1, 2, 3

-1.5

1.5

Output high voltage

OH = -4mA

1, 2, 3

2.4

Output low voltage

OL = 4 mA

1, 2, 3

0.4

1. I

CC1 depends on output load conditions when the device is selected. ICC1(max) is specified with the output open.

2. One Bank Operation

3. Input signals are changed once per clock.

4. After power down mode, CLK operating current.

5. After power down mode, no CLK operating current.

6. Input signals are changed once per two clocks.

7. Input signals for V

IH or VIL are fixed.

8. Input signals are changed once per four clocks.

9. After self refresh mode set, self refresh current. Use Self Refresh for temperatures less than 70 °C ONLY

TABLE 4. DC ELECTRICAL CHARACTERISTICS

CC = 3.3V + 0.3V, VCCQ = 3.3V + 0.3V, TA = -55 TO 125° C, UNLESS OTHERWISE SPECIFIED)

PARAMETER

SYMBOL

TEST CONDITIONS

SUBGROUPS

MIN

MAX

UNITS

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