VSC7440 datasheet(290/444 Pages) MICROSEMI

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Functional Descriptions

VMDS-10492 VSC7440 Datasheet Revision 4.2

273

3.27.2

Maintaining the Cell Buffer

The cell buffer is responsible for aligning and buffering the cell data received from the rewriter before the

data are forwarded on the Taxi bus.

The cell buffer can be flushed for each port separately.

The following table lists registers associated with configuring buffer maintenance.

Before a buffer is flushed, ensure that no data is forwarded to this port by stopping the QSYS forwarding

and disabling FC/PFC so that frames waiting for transmission will be sent. FC can be disabled in

DSM::RX_PAUSE_CFG.RX_PAUSE_EN.

3.27.3

Setting Up MAC Control Sublayer PAUSE Function

This section provides information about setting up the MAC control sublayer PAUSE function.

3.27.3.1 PAUSE Frame Generation

The main sources for triggering generation of PAUSE frames are the port level and buffer level

watermarks in the queue system. It is also possible to trigger PAUSE generation based on the analyzer

policing state.

For watermark-based PAUSE generation, a hysteresis is implemented. FC is indicated when the level of

used resources exceeds the high watermark and it is released when the level falls below the low

watermark. The following table lists the registers associated with configuration PAUSE frame generation.

DSM::MAC_CFG.TX_PAUSE_VAL defines the timer value for generated PAUSE frames. If the state

does not change by half of the time specified in this bit group, a new PAUSE frame is generated.

To generate a zero value pause frame when the reason for pausing has disappeared, set

DSM::MAC_CFG.TX_PAUSE_XON_XOFF to 1.

The DMAC of a generated pause frame is always the globally assigned 48-bit multicast address 01 80

C2 00 00 01.

The SMAC of a generated pause frame is defined by

DSM::MAC_ADDR_BASE_HIGH_CFG.MAC_ADDR_HIGH and

DSM::MAC_ADDR_BASE_LOW_CFG.MAC_ADDR_LOW.

Table 194 •

Buffer Maintenance Configuration Register Overview

Target::Register.Field

Description

Replication

DSM::CLR_BUF.CLR_BUF

Flush the cell buffer.

Per port

Table 195 •

PAUSE Frame Generation Configuration Registers Overview

Target::Register.Field

Description

Replication

DSM::ETH_FC_CFG.FC_ANA_ENA

Controls generation of FC based on FC request from the

analyzer.

Per port

DSM::ETH_FC_CFG.FC_QS_ENA

Controls the generation of FC based on FC request from

the queue system.

Per port

DSM::MAC_CFG.TX_PAUSE_VAL

The pause_time as defined by IEEE802.3 Annex 31B2.

Per port

DSM::MAC_CFG.TX_PAUSE_XON_XOFF

TX PAUSE zero on deassert.

Per port

DSM::MAC_ADDR_BASE_HIGH_CFG.

MAC_ADDR_HIGH

Bits 47-24 of SMAC address used in MAC_Control

frames.

Per port

DSM::MAC_ADDR_BASE_LOW_CFG.

MAC_ADDR_LOW

Bits 23-0 of SMAC address used in MAC_Control frames. Per port

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