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VSC7511 Datasheet(PDF) 210 Page - Microsemi Corporation

Part # VSC7511
Description  4-Port Layer-2 Gigabit Ethernet Switch
PDF  324 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

VSC7511 Datasheet(HTML) 210 Page - Microsemi Corporation

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VCore-Ie System and CPU Interfaces
VMDS-10488 VSC7511 Datasheet Revision 4.2
195
After completing all initial configurations, the SI master controller is enabled by writing
SIMCEN.SIMCEN = 1. Some registers can only be written when the controller is in disabled state. This is
noted in the register-descriptions for the affected registers.
4.8.2.1
SPI Protocol
When the SI master controller is configured for SPI mode, clock polarity and position is configurable in
CTRLR0.SCPH and CTRLR0.SCPOL. The following illustration shows the four possible combinations for
8-bit transfers.
Figure 75 •
SIMC SPI Clock Configurations
Data is sampled in the middle of the data-eye.
When using SPI protocol and transferring more than one data frame at the time, the controller performs
one consecutive transfer. The following illustration shows a transfer of three data frames of 4 bits each.
Note Transmitting transfers end when the transmit FIFO runs out of data frames. Receive only transfers
end when the pre-defined number of data-frames is read from the SI interface.
Figure 76 •
SIMC SPI 3x Transfers
4.8.2.2
SSP Protocol
The SSP protocol for transferring two 6-bit data frames is shown in the following illustration. When using
SSP mode, CTRLR0.SCPH and CTRLR0.SCPOL must remain zero.
SI_nCS0
SI_CLK
SI_DO
SI_DI
7
543
2
1
0
CTRLR0.SCPH = 0, CTRLR0.SCPOL = 0
6
SI_nCS0
SI_CLK
SI_DO
SI_DI
7
543
2
1
0
CTRLR0.SCPH = 1, CTRLR0.SCPOL = 0
6
SI_nCS0
SI_CLK
SI_DO
SI_DI
7
5
4
3
210
CTRLR0.SCPH = 1, CTRLR0.SCPOL = 1
6
SI_nCS0
SI_CLK
SI_DO
SI_DI
7
5
4
3
210
CTRLR0.SCPH = 0, CTRLR0.SCPOL = 1
6
7
543
2
1
0
6
7
5
4
3
210
6
7
5
4
3
210
6
7
543
2
1
0
6
SI_nCS0
SI_CLK
SI_DO
SI_DI
3
1
0
3
210
First frame
2
3
1
0
3
210
2
32
1
0
32
1
0
Second frame
Third frame



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