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LP3995 Datasheet(PDF) 5 Page - Lowpower Semiconductor inc |
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LP3995 Datasheet(HTML) 5 Page - Lowpower Semiconductor inc |
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5 / 9 page ![]() LP3995-02 Apr.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 5 of 9 Preliminary Datasheet LP3995 Applications Information L ike any low-dropout regulator, the external capacitors used with the LP3995 must be carefully selected for regulator stability and performance. Using a capacitor whose value is ≥ 10µF on the LP3995 input. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDO`s application. The LP3995 is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 10µF with ESR is > 25mΩ on the LP3995 output ensures stability. The LP3995 still works well with output capacitor of other types due to the wide stable ESR range. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output capacitor should be located not more than 0.5 inch from the VOUT pin of the LP3995 and returned to a clean analog ground. Thermal Considerations Thermal protection limits power dissipation in LP3995. When the operation junction temperature exceeds 150°C, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turns on again after the junction temperature cools by 30°C. For continue operation, do not exceed absolute maximum operation junction temperature 125°C. The power dissipation definition in device is: PD = (VIN−VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction and ambient. The maximum power dissipation can be calculated by following formula: PD(MAX) = ( TJ(MAX) − TA ) /θJA Where TJ(MAX) is the maximum operation junction temperature 125°C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. For recommended operating conditions specification of LP3995, the junction to ambient thermal resistance (θJA is layout dependent) for LP3995 showed below. SOT23-3 : 250℃/W SOT23-5 : 250℃/W SOT89-3 : 180℃/W TO92 : 180℃/W And, PD=(125°C−25°C)/250℃/W= 400mW (SOT23-3) PD=(125°C−25°C)/250℃/W= 400mW (SOT23-5) PD=(125°C−25°C)/165℃/W= 600mW (SOT89-3) PD=(125°C−25°C)/180℃/W= 550mW (TO92) The maximum power dissipation depends on operating ambient temperature for fixed TJ(MAX) and thermal resistance θJA. |
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